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wdenkea8015b2002-10-26 16:43:06 +00001/*
wdenkdc7c9a12003-03-26 06:55:25 +00002 * (C) Copyright 2001
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
5 * (C) Copyright 2001
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
wdenkea8015b2002-10-26 16:43:06 +00007 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#include <common.h>
wdenkdc7c9a12003-03-26 06:55:25 +000028#include <linux/byteorder/swab.h>
wdenkea8015b2002-10-26 16:43:06 +000029
30
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020031flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
wdenkea8015b2002-10-26 16:43:06 +000032
wdenkdc7c9a12003-03-26 06:55:25 +000033/* Board support for 1 or 2 flash devices */
34#undef FLASH_PORT_WIDTH32
35#define FLASH_PORT_WIDTH16
36
37#ifdef FLASH_PORT_WIDTH16
38#define FLASH_PORT_WIDTH ushort
39#define FLASH_PORT_WIDTHV vu_short
40#define SWAP(x) __swab16(x)
41#else
42#define FLASH_PORT_WIDTH ulong
43#define FLASH_PORT_WIDTHV vu_long
44#define SWAP(x) __swab32(x)
45#endif
46
47#define FPW FLASH_PORT_WIDTH
48#define FPWV FLASH_PORT_WIDTHV
49
50#define mb() __asm__ __volatile__ ("" : : : "memory")
51
52/*-----------------------------------------------------------------------
53 * Functions
wdenkea8015b2002-10-26 16:43:06 +000054 */
wdenkdc7c9a12003-03-26 06:55:25 +000055static ulong flash_get_size (FPW *addr, flash_info_t *info);
56static int write_data (flash_info_t *info, ulong dest, FPW data);
57static void flash_get_offsets (ulong base, flash_info_t *info);
58void inline spin_wheel(void);
wdenkea8015b2002-10-26 16:43:06 +000059
60/*-----------------------------------------------------------------------
61 */
62
wdenkdc7c9a12003-03-26 06:55:25 +000063unsigned long flash_init (void)
wdenkea8015b2002-10-26 16:43:06 +000064{
wdenkdc7c9a12003-03-26 06:55:25 +000065 int i;
wdenkea8015b2002-10-26 16:43:06 +000066 ulong size = 0;
67
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020068 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
wdenkea8015b2002-10-26 16:43:06 +000069 {
wdenk8bde7f72003-06-27 21:31:46 +000070 switch (i)
71 {
72 case 0:
73 flash_get_size((FPW *)PHYS_FLASH_1, &flash_info[i]);
74 flash_get_offsets(PHYS_FLASH_1, &flash_info[i]);
75 break;
76 default:
wdenk5f535fe2003-09-18 09:21:33 +000077 panic("configured too many flash banks!\n");
wdenk8bde7f72003-06-27 21:31:46 +000078 break;
79 }
wdenkea8015b2002-10-26 16:43:06 +000080 size += flash_info[i].size;
81 }
82
83 /* Protect monitor and environment sectors
84 */
85 flash_protect(FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020086 CONFIG_SYS_FLASH_BASE,
87 CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
wdenkea8015b2002-10-26 16:43:06 +000088 &flash_info[0]);
89
90 flash_protect(FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020091 CONFIG_ENV_ADDR,
92 CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
wdenkea8015b2002-10-26 16:43:06 +000093 &flash_info[0]);
94
95 return size;
96}
97
98/*-----------------------------------------------------------------------
99 */
wdenkdc7c9a12003-03-26 06:55:25 +0000100static void flash_get_offsets (ulong base, flash_info_t *info)
wdenkea8015b2002-10-26 16:43:06 +0000101{
wdenkdc7c9a12003-03-26 06:55:25 +0000102 int i;
wdenkea8015b2002-10-26 16:43:06 +0000103
wdenkdc7c9a12003-03-26 06:55:25 +0000104 if (info->flash_id == FLASH_UNKNOWN) {
105 return;
wdenkea8015b2002-10-26 16:43:06 +0000106 }
wdenkea8015b2002-10-26 16:43:06 +0000107
wdenkdc7c9a12003-03-26 06:55:25 +0000108 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
109 for (i = 0; i < info->sector_count; i++) {
110 info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
111 info->protect[i] = 0;
112 }
113 }
wdenkea8015b2002-10-26 16:43:06 +0000114}
115
116/*-----------------------------------------------------------------------
117 */
wdenkdc7c9a12003-03-26 06:55:25 +0000118void flash_print_info (flash_info_t *info)
wdenkea8015b2002-10-26 16:43:06 +0000119{
wdenkdc7c9a12003-03-26 06:55:25 +0000120 int i;
wdenkea8015b2002-10-26 16:43:06 +0000121
wdenkdc7c9a12003-03-26 06:55:25 +0000122 if (info->flash_id == FLASH_UNKNOWN) {
123 printf ("missing or unknown FLASH type\n");
124 return;
wdenk8bde7f72003-06-27 21:31:46 +0000125 }
wdenkea8015b2002-10-26 16:43:06 +0000126
wdenkdc7c9a12003-03-26 06:55:25 +0000127 switch (info->flash_id & FLASH_VENDMASK) {
128 case FLASH_MAN_INTEL: printf ("INTEL "); break;
129 default: printf ("Unknown Vendor "); break;
wdenkea8015b2002-10-26 16:43:06 +0000130 }
131
wdenkdc7c9a12003-03-26 06:55:25 +0000132 switch (info->flash_id & FLASH_TYPEMASK) {
133 case FLASH_28F128J3A:
134 printf ("28F128J3A\n"); break;
135 default: printf ("Unknown Chip Type\n"); break;
wdenk8bde7f72003-06-27 21:31:46 +0000136 }
wdenkea8015b2002-10-26 16:43:06 +0000137
wdenkdc7c9a12003-03-26 06:55:25 +0000138 printf (" Size: %ld MB in %d Sectors\n",
wdenk8bde7f72003-06-27 21:31:46 +0000139 info->size >> 20, info->sector_count);
wdenkea8015b2002-10-26 16:43:06 +0000140
wdenkdc7c9a12003-03-26 06:55:25 +0000141 printf (" Sector Start Addresses:");
142 for (i=0; i<info->sector_count; ++i) {
wdenk8bde7f72003-06-27 21:31:46 +0000143 if ((i % 5) == 0)
144 printf ("\n ");
wdenkdc7c9a12003-03-26 06:55:25 +0000145 printf (" %08lX%s",
146 info->start[i],
147 info->protect[i] ? " (RO)" : " "
148 );
wdenk8bde7f72003-06-27 21:31:46 +0000149 }
150 printf ("\n");
wdenkdc7c9a12003-03-26 06:55:25 +0000151 return;
wdenkea8015b2002-10-26 16:43:06 +0000152}
153
wdenkdc7c9a12003-03-26 06:55:25 +0000154/*
155 * The following code cannot be run from FLASH!
156 */
157static ulong flash_get_size (FPW *addr, flash_info_t *info)
158{
159 volatile FPW value;
160 /* Write auto select command: read Manufacturer ID */
161 addr[0x5555] = (FPW)0x00AA00AA;
162 addr[0x2AAA] = (FPW)0x00550055;
163 addr[0x5555] = (FPW)0x00900090;
164
165 mb();
166 value = addr[0];
wdenk8bde7f72003-06-27 21:31:46 +0000167
wdenkdc7c9a12003-03-26 06:55:25 +0000168 switch (value) {
169
170 case (FPW)INTEL_MANUFACT:
171 info->flash_id = FLASH_MAN_INTEL;
172 break;
173
174 default:
175 info->flash_id = FLASH_UNKNOWN;
176 info->sector_count = 0;
177 info->size = 0;
178 addr[0] = (FPW)0x00FF00FF; /* restore read mode */
179 return (0); /* no or unknown flash */
180 }
181
182 mb();
183 value = addr[1]; /* device ID */
184 switch (value) {
185
186 case (FPW)INTEL_ID_28F128J3A:
187 info->flash_id += FLASH_28F128J3A;
188 info->sector_count = 128;
189 info->size = 0x02000000;
190 break; /* => 16 MB */
191
192 default:
193 info->flash_id = FLASH_UNKNOWN;
194 break;
195 }
196
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200197 if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
wdenkdc7c9a12003-03-26 06:55:25 +0000198 printf ("** ERROR: sector count %d > max (%d) **\n",
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200199 info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
200 info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
wdenkdc7c9a12003-03-26 06:55:25 +0000201 }
202
203 addr[0] = (FPW)0x00FF00FF; /* restore read mode */
204
205 return (info->size);
206}
207
208
wdenkea8015b2002-10-26 16:43:06 +0000209/*-----------------------------------------------------------------------
210 */
211
212int flash_erase (flash_info_t *info, int s_first, int s_last)
213{
wdenkdc7c9a12003-03-26 06:55:25 +0000214 int flag, prot, sect;
215 ulong type, start, last;
216 int rcode = 0;
wdenkea8015b2002-10-26 16:43:06 +0000217
218 if ((s_first < 0) || (s_first > s_last)) {
wdenkdc7c9a12003-03-26 06:55:25 +0000219 if (info->flash_id == FLASH_UNKNOWN) {
220 printf ("- missing\n");
221 } else {
222 printf ("- no sectors to erase\n");
223 }
224 return 1;
wdenkea8015b2002-10-26 16:43:06 +0000225 }
226
wdenkdc7c9a12003-03-26 06:55:25 +0000227 type = (info->flash_id & FLASH_VENDMASK);
228 if ((type != FLASH_MAN_INTEL)) {
229 printf ("Can't erase unknown flash type %08lx - aborted\n",
230 info->flash_id);
231 return 1;
wdenkea8015b2002-10-26 16:43:06 +0000232 }
233
234 prot = 0;
235 for (sect=s_first; sect<=s_last; ++sect) {
236 if (info->protect[sect]) {
237 prot++;
238 }
239 }
wdenkea8015b2002-10-26 16:43:06 +0000240
wdenkdc7c9a12003-03-26 06:55:25 +0000241 if (prot) {
242 printf ("- Warning: %d protected sectors will not be erased!\n",
243 prot);
244 } else {
245 printf ("\n");
246 }
247
248 start = get_timer (0);
249 last = start;
250
251 /* Disable interrupts which might cause a timeout here */
252 flag = disable_interrupts();
wdenkea8015b2002-10-26 16:43:06 +0000253
254 /* Start erase on unprotected sectors */
wdenkdc7c9a12003-03-26 06:55:25 +0000255 for (sect = s_first; sect<=s_last; sect++) {
256 if (info->protect[sect] == 0) { /* not protected */
257 FPWV *addr = (FPWV *)(info->start[sect]);
258 FPW status;
259
wdenkea8015b2002-10-26 16:43:06 +0000260 printf("Erasing sector %2d ... ", sect);
261
262 /* arm simple, non interrupt dependent timer */
263 reset_timer_masked();
264
wdenkdc7c9a12003-03-26 06:55:25 +0000265 *addr = (FPW)0x00500050; /* clear status register */
266 *addr = (FPW)0x00200020; /* erase setup */
267 *addr = (FPW)0x00D000D0; /* erase confirm */
wdenkea8015b2002-10-26 16:43:06 +0000268
wdenkdc7c9a12003-03-26 06:55:25 +0000269 while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200270 if (get_timer_masked() > CONFIG_SYS_FLASH_ERASE_TOUT) {
wdenkdc7c9a12003-03-26 06:55:25 +0000271 printf ("Timeout\n");
272 *addr = (FPW)0x00B000B0; /* suspend erase */
273 *addr = (FPW)0x00FF00FF; /* reset to read mode */
274 rcode = 1;
275 break;
wdenkea8015b2002-10-26 16:43:06 +0000276 }
277 }
278
wdenkdc7c9a12003-03-26 06:55:25 +0000279 *addr = (FPW)0x00500050; /* clear status register cmd. */
280 *addr = (FPW)0x00FF00FF; /* resest to read mode */
wdenkea8015b2002-10-26 16:43:06 +0000281
wdenkdc7c9a12003-03-26 06:55:25 +0000282 printf (" done\n");
wdenk8bde7f72003-06-27 21:31:46 +0000283 }
284 }
wdenkdc7c9a12003-03-26 06:55:25 +0000285 return rcode;
wdenkea8015b2002-10-26 16:43:06 +0000286}
287
288/*-----------------------------------------------------------------------
wdenkdc7c9a12003-03-26 06:55:25 +0000289 * Copy memory to flash, returns:
290 * 0 - OK
291 * 1 - write timeout
292 * 2 - Flash not erased
293 * 4 - Flash not identified
wdenkea8015b2002-10-26 16:43:06 +0000294 */
295
296int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
297{
wdenkdc7c9a12003-03-26 06:55:25 +0000298 ulong cp, wp;
299 FPW data;
300 int count, i, l, rc, port_width;
wdenkea8015b2002-10-26 16:43:06 +0000301
wdenkdc7c9a12003-03-26 06:55:25 +0000302 if (info->flash_id == FLASH_UNKNOWN) {
303 return 4;
304 }
305/* get lower word aligned address */
306#ifdef FLASH_PORT_WIDTH16
307 wp = (addr & ~1);
308 port_width = 2;
309#else
310 wp = (addr & ~3);
311 port_width = 4;
312#endif
wdenkea8015b2002-10-26 16:43:06 +0000313
314 /*
315 * handle unaligned start bytes
316 */
317 if ((l = addr - wp) != 0) {
318 data = 0;
319 for (i=0, cp=wp; i<l; ++i, ++cp) {
wdenkdc7c9a12003-03-26 06:55:25 +0000320 data = (data << 8) | (*(uchar *)cp);
wdenkea8015b2002-10-26 16:43:06 +0000321 }
wdenkdc7c9a12003-03-26 06:55:25 +0000322 for (; i<port_width && cnt>0; ++i) {
323 data = (data << 8) | *src++;
wdenkea8015b2002-10-26 16:43:06 +0000324 --cnt;
325 ++cp;
326 }
wdenkdc7c9a12003-03-26 06:55:25 +0000327 for (; cnt==0 && i<port_width; ++i, ++cp) {
328 data = (data << 8) | (*(uchar *)cp);
wdenkea8015b2002-10-26 16:43:06 +0000329 }
330
wdenkdc7c9a12003-03-26 06:55:25 +0000331 if ((rc = write_data(info, wp, SWAP(data))) != 0) {
wdenkea8015b2002-10-26 16:43:06 +0000332 return (rc);
333 }
wdenkdc7c9a12003-03-26 06:55:25 +0000334 wp += port_width;
wdenkea8015b2002-10-26 16:43:06 +0000335 }
336
337 /*
338 * handle word aligned part
339 */
wdenkdc7c9a12003-03-26 06:55:25 +0000340 count = 0;
341 while (cnt >= port_width) {
342 data = 0;
343 for (i=0; i<port_width; ++i) {
344 data = (data << 8) | *src++;
345 }
346 if ((rc = write_data(info, wp, SWAP(data))) != 0) {
wdenkea8015b2002-10-26 16:43:06 +0000347 return (rc);
348 }
wdenkdc7c9a12003-03-26 06:55:25 +0000349 wp += port_width;
350 cnt -= port_width;
351 if (count++ > 0x800)
352 {
wdenk8bde7f72003-06-27 21:31:46 +0000353 spin_wheel();
wdenkdc7c9a12003-03-26 06:55:25 +0000354 count = 0;
355 }
wdenkea8015b2002-10-26 16:43:06 +0000356 }
357
358 if (cnt == 0) {
wdenkdc7c9a12003-03-26 06:55:25 +0000359 return (0);
wdenkea8015b2002-10-26 16:43:06 +0000360 }
361
362 /*
363 * handle unaligned tail bytes
364 */
365 data = 0;
wdenkdc7c9a12003-03-26 06:55:25 +0000366 for (i=0, cp=wp; i<port_width && cnt>0; ++i, ++cp) {
367 data = (data << 8) | *src++;
wdenkea8015b2002-10-26 16:43:06 +0000368 --cnt;
369 }
wdenkdc7c9a12003-03-26 06:55:25 +0000370 for (; i<port_width; ++i, ++cp) {
371 data = (data << 8) | (*(uchar *)cp);
372 }
373
374 return (write_data(info, wp, SWAP(data)));
375}
376
377/*-----------------------------------------------------------------------
378 * Write a word or halfword to Flash, returns:
379 * 0 - OK
380 * 1 - write timeout
381 * 2 - Flash not erased
382 */
383static int write_data (flash_info_t *info, ulong dest, FPW data)
384{
385 FPWV *addr = (FPWV *)dest;
386 ulong status;
387 int flag;
388
389 /* Check if Flash is (sufficiently) erased */
390 if ((*addr & data) != data) {
391 printf("not erased at %08lx (%x)\n",(ulong)addr,*addr);
392 return (2);
393 }
394 /* Disable interrupts which might cause a timeout here */
395 flag = disable_interrupts();
396
397 *addr = (FPW)0x00400040; /* write setup */
398 *addr = data;
399
400 /* arm simple, non interrupt dependent timer */
401 reset_timer_masked();
402
403 /* wait while polling the status register */
404 while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200405 if (get_timer_masked() > CONFIG_SYS_FLASH_WRITE_TOUT) {
wdenkdc7c9a12003-03-26 06:55:25 +0000406 *addr = (FPW)0x00FF00FF; /* restore read mode */
407 return (1);
408 }
wdenkea8015b2002-10-26 16:43:06 +0000409 }
410
wdenkdc7c9a12003-03-26 06:55:25 +0000411 *addr = (FPW)0x00FF00FF; /* restore read mode */
412
413 return (0);
wdenkea8015b2002-10-26 16:43:06 +0000414}
wdenkdc7c9a12003-03-26 06:55:25 +0000415
416void inline
417spin_wheel(void)
418{
419 static int p=0;
420 static char w[] = "\\/-";
421
422 printf("\010%c", w[p]);
423 (++p == 3) ? (p = 0) : 0;
424}