wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 1 | /* |
| 2 | * linux/include/asm-arm/arch-pxa/hardware.h |
| 3 | * |
| 4 | * Author: Nicolas Pitre |
| 5 | * Created: Jun 15, 2001 |
| 6 | * Copyright: MontaVista Software Inc. |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 7 | * |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | * Note: This file was taken from linux-2.4.19-rmk4-pxa1 |
| 13 | * |
| 14 | * - 2003/01/20 implementation specifics activated |
| 15 | * Robert Schwebel <r.schwebel@pengutronix.de> |
| 16 | */ |
| 17 | |
| 18 | #ifndef __ASM_ARCH_HARDWARE_H |
| 19 | #define __ASM_ARCH_HARDWARE_H |
| 20 | |
| 21 | #include <linux/config.h> |
| 22 | #include <asm/mach-types.h> |
| 23 | |
| 24 | |
| 25 | /* |
| 26 | * These are statically mapped PCMCIA IO space for designs using it as a |
| 27 | * generic IO bus, typically with ISA parts, hardwired IDE interfaces, etc. |
| 28 | * The actual PCMCIA code is mapping required IO region at run time. |
| 29 | */ |
| 30 | #define PCMCIA_IO_0_BASE 0xf6000000 |
| 31 | #define PCMCIA_IO_1_BASE 0xf7000000 |
| 32 | |
| 33 | |
| 34 | /* |
| 35 | * We requires absolute addresses. |
| 36 | */ |
| 37 | #define PCIO_BASE 0 |
| 38 | |
| 39 | /* |
| 40 | * Workarounds for at least 2 errata so far require this. |
| 41 | * The mapping is set in mach-pxa/generic.c. |
| 42 | */ |
| 43 | #define UNCACHED_PHYS_0 0xff000000 |
| 44 | #define UNCACHED_ADDR UNCACHED_PHYS_0 |
| 45 | |
| 46 | /* |
| 47 | * Intel PXA internal I/O mappings: |
| 48 | * |
| 49 | * 0x40000000 - 0x41ffffff <--> 0xf8000000 - 0xf9ffffff |
| 50 | * 0x44000000 - 0x45ffffff <--> 0xfa000000 - 0xfbffffff |
| 51 | * 0x48000000 - 0x49ffffff <--> 0xfc000000 - 0xfdffffff |
| 52 | */ |
| 53 | |
| 54 | /* FIXME: Only this does work for u-boot... find out why... [RS] */ |
| 55 | #define UBOOT_REG_FIX 1 |
| 56 | |
| 57 | #ifndef UBOOT_REG_FIX |
| 58 | #ifndef __ASSEMBLY__ |
| 59 | |
| 60 | #define io_p2v(x) ( ((x) | 0xbe000000) ^ (~((x) >> 1) & 0x06000000) ) |
| 61 | #define io_v2p( x ) ( ((x) & 0x41ffffff) ^ ( ((x) & 0x06000000) << 1) ) |
| 62 | |
| 63 | /* |
| 64 | * This __REG() version gives the same results as the one above, except |
| 65 | * that we are fooling gcc somehow so it generates far better and smaller |
| 66 | * assembly code for access to contigous registers. It's a shame that gcc |
| 67 | * doesn't guess this by itself. |
| 68 | */ |
| 69 | #include <asm/types.h> |
| 70 | typedef struct { volatile u32 offset[4096]; } __regbase; |
| 71 | # define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2] |
| 72 | # define __REG(x) __REGP(io_p2v(x)) |
| 73 | #endif |
| 74 | |
| 75 | /* Let's kick gcc's ass again... */ |
| 76 | # define __REG2(x,y) \ |
| 77 | ( __builtin_constant_p(y) ? (__REG((x) + (y))) \ |
| 78 | : (*(volatile u32 *)((u32)&__REG(x) + (y))) ) |
| 79 | |
| 80 | # define __PREG(x) (io_v2p((u32)&(x))) |
| 81 | |
| 82 | #else |
| 83 | |
| 84 | # define __REG(x) io_p2v(x) |
| 85 | # define __PREG(x) io_v2p(x) |
| 86 | |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 87 | # undef io_p2v |
| 88 | # undef __REG |
| 89 | # ifndef __ASSEMBLY__ |
| 90 | # define io_p2v(PhAdd) (PhAdd) |
| 91 | # define __REG(x) (*((volatile u32 *)io_p2v(x))) |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 92 | # define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y))) |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 93 | # else |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 94 | # define __REG(x) (x) |
wdenk | b4676a2 | 2003-12-07 19:24:00 +0000 | [diff] [blame^] | 95 | # endif |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 96 | #endif /* UBOOT_REG_FIX */ |
| 97 | |
| 98 | #include "pxa-regs.h" |
| 99 | |
| 100 | #ifndef __ASSEMBLY__ |
| 101 | |
| 102 | /* |
| 103 | * GPIO edge detection for IRQs: |
| 104 | * IRQs are generated on Falling-Edge, Rising-Edge, or both. |
| 105 | * This must be called *before* the corresponding IRQ is registered. |
| 106 | * Use this instead of directly setting GRER/GFER. |
| 107 | */ |
| 108 | #define GPIO_FALLING_EDGE 1 |
| 109 | #define GPIO_RISING_EDGE 2 |
| 110 | #define GPIO_BOTH_EDGES 3 |
| 111 | extern void set_GPIO_IRQ_edge( int gpio_nr, int edge_mask ); |
| 112 | |
| 113 | /* |
| 114 | * Handy routine to set GPIO alternate functions |
| 115 | */ |
| 116 | extern void set_GPIO_mode( int gpio_mode ); |
| 117 | |
| 118 | /* |
| 119 | * return current lclk frequency in units of 10kHz |
| 120 | */ |
| 121 | extern unsigned int get_lclk_frequency_10khz(void); |
| 122 | |
| 123 | #endif |
| 124 | |
| 125 | |
| 126 | /* |
| 127 | * Implementation specifics |
| 128 | */ |
| 129 | |
| 130 | #ifdef CONFIG_ARCH_LUBBOCK |
| 131 | #include "lubbock.h" |
| 132 | #endif |
| 133 | |
| 134 | #ifdef CONFIG_ARCH_PXA_IDP |
| 135 | #include "idp.h" |
| 136 | #endif |
| 137 | |
| 138 | #ifdef CONFIG_ARCH_PXA_CERF |
| 139 | #include "cerf.h" |
| 140 | #endif |
| 141 | |
| 142 | #ifdef CONFIG_ARCH_CSB226 |
| 143 | #include "csb226.h" |
| 144 | #endif |
| 145 | |
| 146 | #ifdef CONFIG_ARCH_INNOKOM |
| 147 | #include "innokom.h" |
| 148 | #endif |
| 149 | |
| 150 | #endif /* _ASM_ARCH_HARDWARE_H */ |