Simon Glass | 9944d75 | 2019-04-23 21:56:24 -0600 | [diff] [blame] | 1 | NVIDIA Tegra audio complex, with MAX98090 CODEC |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible : "nvidia,tegra-audio-max98090" |
| 5 | - clocks : Must contain an entry for each entry in clock-names. |
| 6 | See ../clocks/clock-bindings.txt for details. |
| 7 | - clock-names : Must include the following entries: |
| 8 | - pll_a |
| 9 | - pll_a_out0 |
| 10 | - mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk) |
| 11 | - nvidia,model : The user-visible name of this sound complex. |
| 12 | - nvidia,audio-routing : A list of the connections between audio components. |
| 13 | Each entry is a pair of strings, the first being the connection's sink, |
| 14 | the second being the connection's source. Valid names for sources and |
| 15 | sinks are the MAX98090's pins (as documented in its binding), and the jacks |
| 16 | on the board: |
| 17 | |
| 18 | * Headphones |
| 19 | * Speakers |
| 20 | * Mic Jack |
| 21 | * Int Mic |
| 22 | |
| 23 | - nvidia,i2s-controller : The phandle of the Tegra I2S controller that's |
| 24 | connected to the CODEC. |
| 25 | - nvidia,audio-codec : The phandle of the MAX98090 audio codec. |
| 26 | |
| 27 | Optional properties: |
| 28 | - nvidia,hp-det-gpios : The GPIO that detect headphones are plugged in |
| 29 | - nvidia,mic-det-gpios : The GPIO that detect microphones are plugged in |
Simon Glass | b4bf714 | 2019-04-23 21:56:25 -0600 | [diff] [blame^] | 30 | - codec-enable-gpio : The GPIO used to enable the audio codec |
Simon Glass | 9944d75 | 2019-04-23 21:56:24 -0600 | [diff] [blame] | 31 | |
| 32 | Example: |
| 33 | |
| 34 | sound { |
| 35 | compatible = "nvidia,tegra-audio-max98090-venice2", |
| 36 | "nvidia,tegra-audio-max98090"; |
| 37 | nvidia,model = "NVIDIA Tegra Venice2"; |
| 38 | |
| 39 | nvidia,audio-routing = |
| 40 | "Headphones", "HPR", |
| 41 | "Headphones", "HPL", |
| 42 | "Speakers", "SPKR", |
| 43 | "Speakers", "SPKL", |
| 44 | "Mic Jack", "MICBIAS", |
| 45 | "IN34", "Mic Jack"; |
| 46 | |
| 47 | nvidia,i2s-controller = <&tegra_i2s1>; |
| 48 | nvidia,audio-codec = <&acodec>; |
| 49 | |
| 50 | clocks = <&tegra_car TEGRA124_CLK_PLL_A>, |
| 51 | <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, |
| 52 | <&tegra_car TEGRA124_CLK_EXTERN1>; |
| 53 | clock-names = "pll_a", "pll_a_out0", "mclk"; |
| 54 | }; |