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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +00002/*
3 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +00004 */
5
Paul Burton7a9d1092013-11-09 10:22:08 +00006#ifndef _MALTA_CONFIG_H
7#define _MALTA_CONFIG_H
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +00008
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +00009/*
10 * System configuration
11 */
Paul Burton7a9d1092013-11-09 10:22:08 +000012#define CONFIG_MALTA
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000013
Gabor Juhosab413052013-10-24 14:32:00 +020014#define CONFIG_MEMSIZE_IN_BYTES
15
Gabor Juhosfeaa6062013-05-22 03:57:42 +000016#define CONFIG_PCI_GT64120
Paul Burtonbaf37f02013-11-08 11:18:50 +000017#define CONFIG_PCI_MSC01
Gabor Juhosfeaa6062013-05-22 03:57:42 +000018
Paul Burton3ced12a2013-11-08 11:18:55 +000019#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
20
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000021/*
22 * CPU Configuration
23 */
24#define CONFIG_SYS_MHZ 250 /* arbitrary value */
25#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000026
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000027/*
28 * Memory map
29 */
Gabor Juhos10473d02013-11-12 16:47:32 +010030#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000031
Paul Burton0f832b92016-05-26 14:49:36 +010032#ifdef CONFIG_64BIT
33# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
34#else
35# define CONFIG_SYS_SDRAM_BASE 0x80000000
36#endif
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000037#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
38
39#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
40
Paul Burton0f832b92016-05-26 14:49:36 +010041#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000)
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000042
43#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
44#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
Paul Burton67d47522013-11-26 17:45:28 +000045#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000046
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000047/*
48 * Serial driver
49 */
Paul Burton2e7eb122016-05-17 07:43:27 +010050#define CONFIG_SYS_NS16550_PORT_MAPPED
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000051
52/*
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000053 * Flash configuration
54 */
Paul Burton0f832b92016-05-26 14:49:36 +010055#ifdef CONFIG_64BIT
56# define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000
57#else
58# define CONFIG_SYS_FLASH_BASE 0xbe000000
59#endif
Gabor Juhos52caee02013-05-22 03:57:39 +000060#define CONFIG_SYS_MAX_FLASH_BANKS 1
61#define CONFIG_SYS_MAX_FLASH_SECT 128
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000062
63/*
Paul Burtonfba6f452013-11-08 11:18:56 +000064 * Environment
65 */
Paul Burtonfba6f452013-11-08 11:18:56 +000066
67/*
Paul Burtonba21a452015-01-29 10:38:20 +000068 * IDE/ATA
69 */
70#define CONFIG_SYS_IDE_MAXBUS 1
71#define CONFIG_SYS_IDE_MAXDEVICE 2
72#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
73#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
74#define CONFIG_SYS_ATA_DATA_OFFSET 0
75#define CONFIG_SYS_ATA_REG_OFFSET 0
76
77/*
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000078 * Commands
79 */
Gabor Juhosfeaa6062013-05-22 03:57:42 +000080
Paul Burton7a9d1092013-11-09 10:22:08 +000081#endif /* _MALTA_CONFIG_H */