blob: eba812fec969dfaa17c7568a0bffdb4ba7716772 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Charles Manning832472a2014-03-06 15:40:50 +13002/*
3 * Copyright (C) 2014 Charles Manning <cdhmanning@gmail.com>
4 *
Marek Vasutcece78f2018-04-15 13:15:33 +02005 * Reference documents:
6 * Cyclone V SoC: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cyclone-v/cv_5400a.pdf
7 * Arria V SoC: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/arria-v/av_5400a.pdf
8 * Arria 10 SoC: https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/arria-10/a10_5400a.pdf
Charles Manning832472a2014-03-06 15:40:50 +13009 *
Marek Vasutcece78f2018-04-15 13:15:33 +020010 * Bootable SoCFPGA image requires a structure of the following format
11 * positioned at offset 0x40 of the bootable image. Endian is LSB.
Charles Manning832472a2014-03-06 15:40:50 +130012 *
Marek Vasutcece78f2018-04-15 13:15:33 +020013 * There are two versions of the SoCFPGA header format, v0 and v1.
14 * The version 0 is used by Cyclone V SoC and Arria V SoC, while
15 * the version 1 is used by the Arria 10 SoC.
Charles Manning832472a2014-03-06 15:40:50 +130016 *
Marek Vasutcece78f2018-04-15 13:15:33 +020017 * Version 0:
Charles Manning832472a2014-03-06 15:40:50 +130018 * Offset Length Usage
19 * -----------------------
Marek Vasutcece78f2018-04-15 13:15:33 +020020 * 0x40 4 Validation word (0x31305341)
21 * 0x44 1 Version (0x0)
22 * 0x45 1 Flags (unused, zero is fine)
23 * 0x46 2 Length (in units of u32, including the end checksum).
24 * 0x48 2 Zero (0x0)
Charles Manning832472a2014-03-06 15:40:50 +130025 * 0x4A 2 Checksum over the header. NB Not CRC32
26 *
Marek Vasutcece78f2018-04-15 13:15:33 +020027 * Version 1:
28 * Offset Length Usage
29 * -----------------------
30 * 0x40 4 Validation word (0x31305341)
31 * 0x44 1 Version (0x1)
32 * 0x45 1 Flags (unused, zero is fine)
33 * 0x46 2 Header length (in units of u8).
34 * 0x48 4 Length (in units of u8).
35 * 0x4C 4 Image entry offset from standard of header
36 * 0x50 2 Zero (0x0)
37 * 0x52 2 Checksum over the header. NB Not CRC32
38 *
Charles Manning832472a2014-03-06 15:40:50 +130039 * At the end of the code we have a 32-bit CRC checksum over whole binary
40 * excluding the CRC.
41 *
42 * Note that the CRC used here is **not** the zlib/Adler crc32. It is the
43 * CRC-32 used in bzip2, ethernet and elsewhere.
44 *
Marek Vasutcece78f2018-04-15 13:15:33 +020045 * The Image entry offset in version 1 image is relative the the start of
46 * the header, 0x40, and must not be a negative number. Therefore, it is
47 * only possible to make the SoCFPGA jump forward. The U-Boot bootloader
48 * places a trampoline instruction at offset 0x5c, 0x14 bytes from the
49 * start of the SoCFPGA header, which jumps to the reset vector.
50 *
Charles Manning832472a2014-03-06 15:40:50 +130051 * The image is padded out to 64k, because that is what is
52 * typically used to write the image to the boot medium.
53 */
54
55#include "pbl_crc32.h"
56#include "imagetool.h"
Guilherme Maciel Ferreira26621792015-01-15 02:54:43 -020057#include "mkimage.h"
Simon Glass3db71102019-11-14 12:57:16 -070058#include <u-boot/crc.h>
Guilherme Maciel Ferreira26621792015-01-15 02:54:43 -020059
Charles Manning832472a2014-03-06 15:40:50 +130060#include <image.h>
61
62#define HEADER_OFFSET 0x40
63#define VALIDATION_WORD 0x31305341
Ley Foon Tan40551cf2021-01-13 18:53:05 +080064#define IMAGE_ALIGN 16
Charles Manning832472a2014-03-06 15:40:50 +130065
Ley Foon Tan963e17a2020-09-09 11:34:30 +080066/* Minimum and default entry point offset */
67#define ENTRY_POINT_OFFSET 0x14
68
Marek Vasutcece78f2018-04-15 13:15:33 +020069static uint8_t buffer_v0[0x10000];
70static uint8_t buffer_v1[0x40000];
Charles Manning832472a2014-03-06 15:40:50 +130071
Marek Vasutcece78f2018-04-15 13:15:33 +020072struct socfpga_header_v0 {
73 uint32_t validation;
74 uint8_t version;
75 uint8_t flags;
76 uint16_t length_u32;
77 uint16_t zero;
78 uint16_t checksum;
Marek Vasut9f0021a2018-04-15 13:38:49 +020079};
Charles Manning832472a2014-03-06 15:40:50 +130080
Marek Vasutcece78f2018-04-15 13:15:33 +020081struct socfpga_header_v1 {
82 uint32_t validation;
83 uint8_t version;
84 uint8_t flags;
85 uint16_t header_u8;
86 uint32_t length_u8;
87 uint32_t entry_offset;
88 uint16_t zero;
89 uint16_t checksum;
90};
91
92static unsigned int sfp_hdr_size(uint8_t ver)
93{
94 if (ver == 0)
95 return sizeof(struct socfpga_header_v0);
96 if (ver == 1)
97 return sizeof(struct socfpga_header_v1);
98 return 0;
99}
100
Ley Foon Tan40551cf2021-01-13 18:53:05 +0800101static unsigned int sfp_max_size(uint8_t ver)
Marek Vasutcece78f2018-04-15 13:15:33 +0200102{
103 if (ver == 0)
104 return sizeof(buffer_v0);
105 if (ver == 1)
106 return sizeof(buffer_v1);
107 return 0;
108}
109
Ley Foon Tan40551cf2021-01-13 18:53:05 +0800110static unsigned int sfp_aligned_len(uint32_t size)
111{
112 /* Add 4 bytes for CRC and align to 16 bytes */
113 return ALIGN(size + sizeof(uint32_t), IMAGE_ALIGN);
114}
115
Charles Manning832472a2014-03-06 15:40:50 +1300116/*
117 * The header checksum is just a very simple checksum over
118 * the header area.
119 * There is still a crc32 over the whole lot.
120 */
Marek Vasutcece78f2018-04-15 13:15:33 +0200121static uint16_t sfp_hdr_checksum(uint8_t *buf, unsigned char ver)
Charles Manning832472a2014-03-06 15:40:50 +1300122{
Charles Manning832472a2014-03-06 15:40:50 +1300123 uint16_t ret = 0;
Marek Vasutcece78f2018-04-15 13:15:33 +0200124 int len = sfp_hdr_size(ver) - sizeof(ret);
Charles Manning832472a2014-03-06 15:40:50 +1300125
126 while (--len)
127 ret += *buf++;
128
129 return ret;
130}
131
Marek Vasutcece78f2018-04-15 13:15:33 +0200132static void sfp_build_header(uint8_t *buf, uint8_t ver, uint8_t flags,
Ley Foon Tan1d0dc5b2020-09-22 10:19:44 +0800133 uint32_t length_bytes,
134 struct image_tool_params *params)
Charles Manning832472a2014-03-06 15:40:50 +1300135{
Ley Foon Tan1d0dc5b2020-09-22 10:19:44 +0800136 uint32_t entry_offset = params->eflag ? params->ep : ENTRY_POINT_OFFSET;
Marek Vasutcece78f2018-04-15 13:15:33 +0200137 struct socfpga_header_v0 header_v0 = {
138 .validation = cpu_to_le32(VALIDATION_WORD),
139 .version = 0,
140 .flags = flags,
141 .length_u32 = cpu_to_le16(length_bytes / 4),
142 .zero = 0,
143 };
Marek Vasut9f0021a2018-04-15 13:38:49 +0200144
Marek Vasutcece78f2018-04-15 13:15:33 +0200145 struct socfpga_header_v1 header_v1 = {
146 .validation = cpu_to_le32(VALIDATION_WORD),
147 .version = 1,
148 .flags = flags,
149 .header_u8 = cpu_to_le16(sizeof(header_v1)),
150 .length_u8 = cpu_to_le32(length_bytes),
Ley Foon Tan1d0dc5b2020-09-22 10:19:44 +0800151 /* Trampoline offset */
152 .entry_offset = cpu_to_le32(entry_offset),
Marek Vasutcece78f2018-04-15 13:15:33 +0200153 .zero = 0,
154 };
Charles Manning832472a2014-03-06 15:40:50 +1300155
Marek Vasutcece78f2018-04-15 13:15:33 +0200156 uint16_t csum;
157
158 if (ver == 0) {
159 csum = sfp_hdr_checksum((uint8_t *)&header_v0, 0);
160 header_v0.checksum = cpu_to_le16(csum);
161 memcpy(buf, &header_v0, sizeof(header_v0));
162 } else {
163 csum = sfp_hdr_checksum((uint8_t *)&header_v1, 1);
164 header_v1.checksum = cpu_to_le16(csum);
165 memcpy(buf, &header_v1, sizeof(header_v1));
166 }
Charles Manning832472a2014-03-06 15:40:50 +1300167}
168
169/*
170 * Perform a rudimentary verification of header and return
171 * size of image.
172 */
Marek Vasutcece78f2018-04-15 13:15:33 +0200173static int sfp_verify_header(const uint8_t *buf, uint8_t *ver)
Charles Manning832472a2014-03-06 15:40:50 +1300174{
Marek Vasutcece78f2018-04-15 13:15:33 +0200175 struct socfpga_header_v0 header_v0;
176 struct socfpga_header_v1 header_v1;
177 uint16_t hdr_csum, sfp_csum;
178 uint32_t img_len;
Marek Vasut9f0021a2018-04-15 13:38:49 +0200179
Marek Vasutcece78f2018-04-15 13:15:33 +0200180 /*
181 * Header v0 is always smaller than Header v1 and the validation
182 * word and version field is at the same place, so use Header v0
183 * to check for version during verifiction and upgrade to Header
184 * v1 if needed.
185 */
186 memcpy(&header_v0, buf, sizeof(header_v0));
Charles Manning832472a2014-03-06 15:40:50 +1300187
Marek Vasutcece78f2018-04-15 13:15:33 +0200188 if (le32_to_cpu(header_v0.validation) != VALIDATION_WORD)
Charles Manning832472a2014-03-06 15:40:50 +1300189 return -1;
190
Marek Vasutcece78f2018-04-15 13:15:33 +0200191 if (header_v0.version == 0) {
192 hdr_csum = le16_to_cpu(header_v0.checksum);
193 sfp_csum = sfp_hdr_checksum((uint8_t *)&header_v0, 0);
194 img_len = le16_to_cpu(header_v0.length_u32) * 4;
195 } else if (header_v0.version == 1) {
196 memcpy(&header_v1, buf, sizeof(header_v1));
197 hdr_csum = le16_to_cpu(header_v1.checksum);
198 sfp_csum = sfp_hdr_checksum((uint8_t *)&header_v1, 1);
199 img_len = le32_to_cpu(header_v1.length_u8);
200 } else { /* Invalid version */
201 return -EINVAL;
202 }
203
204 /* Verify checksum */
205 if (hdr_csum != sfp_csum)
206 return -EINVAL;
207
Atsushi Nemoto0ca8fd32018-09-21 09:19:13 +0900208 *ver = header_v0.version;
Marek Vasutcece78f2018-04-15 13:15:33 +0200209 return img_len;
Charles Manning832472a2014-03-06 15:40:50 +1300210}
211
212/* Sign the buffer and return the signed buffer size */
Marek Vasutcece78f2018-04-15 13:15:33 +0200213static int sfp_sign_buffer(uint8_t *buf, uint8_t ver, uint8_t flags,
Ley Foon Tan1d0dc5b2020-09-22 10:19:44 +0800214 int len, int pad_64k,
215 struct image_tool_params *params)
Charles Manning832472a2014-03-06 15:40:50 +1300216{
217 uint32_t calc_crc;
Ley Foon Tan40551cf2021-01-13 18:53:05 +0800218 uint32_t crc_off;
Charles Manning832472a2014-03-06 15:40:50 +1300219
220 /* Align the length up */
Ley Foon Tan40551cf2021-01-13 18:53:05 +0800221 len = sfp_aligned_len(len);
Charles Manning832472a2014-03-06 15:40:50 +1300222
Ley Foon Tan40551cf2021-01-13 18:53:05 +0800223 /* Build header */
224 sfp_build_header(buf + HEADER_OFFSET, ver, flags, len, params);
Charles Manning832472a2014-03-06 15:40:50 +1300225
226 /* Calculate and apply the CRC */
Ley Foon Tan40551cf2021-01-13 18:53:05 +0800227 crc_off = len - sizeof(uint32_t); /* at last 4 bytes of image */
228 calc_crc = ~pbl_crc32(0, (char *)buf, crc_off);
Charles Manning832472a2014-03-06 15:40:50 +1300229
Ley Foon Tan40551cf2021-01-13 18:53:05 +0800230 *((uint32_t *)(buf + crc_off)) = cpu_to_le32(calc_crc);
Charles Manning832472a2014-03-06 15:40:50 +1300231
232 if (!pad_64k)
233 return len + 4;
234
Ley Foon Tan40551cf2021-01-13 18:53:05 +0800235 return sfp_max_size(ver);
Charles Manning832472a2014-03-06 15:40:50 +1300236}
237
238/* Verify that the buffer looks sane */
Marek Vasutcece78f2018-04-15 13:15:33 +0200239static int sfp_verify_buffer(const uint8_t *buf)
Charles Manning832472a2014-03-06 15:40:50 +1300240{
241 int len; /* Including 32bit CRC */
242 uint32_t calc_crc;
243 uint32_t buf_crc;
Marek Vasutcece78f2018-04-15 13:15:33 +0200244 uint8_t ver = 0;
Charles Manning832472a2014-03-06 15:40:50 +1300245
Marek Vasutcece78f2018-04-15 13:15:33 +0200246 len = sfp_verify_header(buf + HEADER_OFFSET, &ver);
Charles Manning832472a2014-03-06 15:40:50 +1300247 if (len < 0) {
Guilherme Maciel Ferreira26621792015-01-15 02:54:43 -0200248 debug("Invalid header\n");
Charles Manning832472a2014-03-06 15:40:50 +1300249 return -1;
250 }
251
Ley Foon Tan40551cf2021-01-13 18:53:05 +0800252 if (len < HEADER_OFFSET || len > sfp_max_size(ver)) {
Guilherme Maciel Ferreira26621792015-01-15 02:54:43 -0200253 debug("Invalid header length (%i)\n", len);
Charles Manning832472a2014-03-06 15:40:50 +1300254 return -1;
255 }
256
257 /*
258 * Adjust length to the base of the CRC.
259 * Check the CRC.
260 */
261 len -= 4;
262
263 calc_crc = ~pbl_crc32(0, (const char *)buf, len);
264
Andreas Bießmann686ed2c22014-10-24 23:39:10 +0200265 buf_crc = le32_to_cpu(*((uint32_t *)(buf + len)));
Charles Manning832472a2014-03-06 15:40:50 +1300266
267 if (buf_crc != calc_crc) {
268 fprintf(stderr, "CRC32 does not match (%08x != %08x)\n",
269 buf_crc, calc_crc);
270 return -1;
271 }
272
273 return 0;
274}
275
276/* mkimage glue functions */
277static int socfpgaimage_verify_header(unsigned char *ptr, int image_size,
Marek Vasutcece78f2018-04-15 13:15:33 +0200278 struct image_tool_params *params)
Charles Manning832472a2014-03-06 15:40:50 +1300279{
Marek Vasutcece78f2018-04-15 13:15:33 +0200280 if (image_size < 0x80)
Charles Manning832472a2014-03-06 15:40:50 +1300281 return -1;
282
Marek Vasutcece78f2018-04-15 13:15:33 +0200283 return sfp_verify_buffer(ptr);
Charles Manning832472a2014-03-06 15:40:50 +1300284}
285
Ley Foon Tanbcf33fa2020-12-11 14:46:47 +0800286static void socfpgaimage_print_header_v0(struct socfpga_header_v0 *header)
287{
288 printf("Image Type\t: Cyclone V / Arria V SoC Image\n");
289 printf("Validation word\t: 0x%08x\n",
290 le32_to_cpu(header->validation));
291 printf("Version\t\t: 0x%08x\n", header->version);
292 printf("Flags\t\t: 0x%08x\n", header->flags);
293 printf("Program length\t: 0x%08x\n",
294 le16_to_cpu(header->length_u32));
295 printf("Header checksum\t: 0x%08x\n",
296 le16_to_cpu(header->checksum));
297}
298
299static void socfpgaimage_print_header_v1(struct socfpga_header_v1 *header)
300{
301 printf("Image Type\t: Arria 10 SoC Image\n");
302 printf("Validation word\t: 0x%08x\n",
303 le32_to_cpu(header->validation));
304 printf("Version\t\t: 0x%08x\n", header->version);
305 printf("Flags\t\t: 0x%08x\n", header->flags);
306 printf("Header length\t: 0x%08x\n",
307 le16_to_cpu(header->header_u8));
308 printf("Program length\t: 0x%08x\n",
309 le32_to_cpu(header->length_u8));
310 printf("Program entry\t: 0x%08x\n",
311 le32_to_cpu(header->entry_offset));
312 printf("Header checksum\t: 0x%08x\n",
313 le16_to_cpu(header->checksum));
314}
315
Charles Manning832472a2014-03-06 15:40:50 +1300316static void socfpgaimage_print_header(const void *ptr)
317{
Ley Foon Tanbcf33fa2020-12-11 14:46:47 +0800318 const void *header = ptr + HEADER_OFFSET;
319 struct socfpga_header_v0 *header_v0;
320
321 if (sfp_verify_buffer(ptr) == 0) {
322 header_v0 = (struct socfpga_header_v0 *)header;
323
324 if (header_v0->version == 0)
325 socfpgaimage_print_header_v0(header_v0);
326 else
327 socfpgaimage_print_header_v1((struct socfpga_header_v1 *)header);
328 } else {
Charles Manning832472a2014-03-06 15:40:50 +1300329 printf("Not a sane SOCFPGA preloader\n");
Ley Foon Tanbcf33fa2020-12-11 14:46:47 +0800330 }
Charles Manning832472a2014-03-06 15:40:50 +1300331}
332
Ley Foon Tan963e17a2020-09-09 11:34:30 +0800333static int socfpgaimage_check_params_v0(struct image_tool_params *params)
Charles Manning832472a2014-03-06 15:40:50 +1300334{
335 /* Not sure if we should be accepting fflags */
336 return (params->dflag && (params->fflag || params->lflag)) ||
337 (params->fflag && (params->dflag || params->lflag)) ||
338 (params->lflag && (params->dflag || params->fflag));
339}
340
Ley Foon Tan963e17a2020-09-09 11:34:30 +0800341static int socfpgaimage_check_params_v1(struct image_tool_params *params)
342{
343 /*
344 * If the entry point is specified, ensure it is >= ENTRY_POINT_OFFSET
345 * and it is 4 bytes aligned.
346 */
347 if (params->eflag && (params->ep < ENTRY_POINT_OFFSET ||
348 params->ep % 4 != 0)) {
349 fprintf(stderr,
350 "Error: Entry point must be greater than 0x%x.\n",
351 ENTRY_POINT_OFFSET);
352 return -1;
353 }
354
355 /* Not sure if we should be accepting fflags */
356 return (params->dflag && (params->fflag || params->lflag)) ||
357 (params->fflag && (params->dflag || params->lflag)) ||
358 (params->lflag && (params->dflag || params->fflag));
359}
360
Marek Vasutcece78f2018-04-15 13:15:33 +0200361static int socfpgaimage_check_image_types_v0(uint8_t type)
Charles Manning832472a2014-03-06 15:40:50 +1300362{
363 if (type == IH_TYPE_SOCFPGAIMAGE)
364 return EXIT_SUCCESS;
365 return EXIT_FAILURE;
366}
367
Marek Vasutcece78f2018-04-15 13:15:33 +0200368static int socfpgaimage_check_image_types_v1(uint8_t type)
369{
370 if (type == IH_TYPE_SOCFPGAIMAGE_V1)
371 return EXIT_SUCCESS;
372 return EXIT_FAILURE;
373}
374
Charles Manning832472a2014-03-06 15:40:50 +1300375/*
376 * To work in with the mkimage framework, we do some ugly stuff...
377 *
378 * First, socfpgaimage_vrec_header() is called.
Ley Foon Tan40551cf2021-01-13 18:53:05 +0800379 * We prepend a fake header big enough to include crc32 and align image to 16
380 * bytes.
Charles Manning832472a2014-03-06 15:40:50 +1300381 * This gives us enough space to do what we want later.
382 *
383 * Next, socfpgaimage_set_header() is called.
384 * We fix up the buffer by moving the image to the start of the buffer.
Ley Foon Tan40551cf2021-01-13 18:53:05 +0800385 * We now have some room to do what we need (add CRC).
Charles Manning832472a2014-03-06 15:40:50 +1300386 */
387
388static int data_size;
Charles Manning832472a2014-03-06 15:40:50 +1300389
Marek Vasutcece78f2018-04-15 13:15:33 +0200390static int sfp_fake_header_size(unsigned int size, uint8_t ver)
391{
Ley Foon Tan40551cf2021-01-13 18:53:05 +0800392 unsigned int align_size;
393
394 align_size = sfp_aligned_len(size);
395
396 /* extra bytes needed */
397 return align_size - size;
Marek Vasutcece78f2018-04-15 13:15:33 +0200398}
399
400static int sfp_vrec_header(struct image_tool_params *params,
401 struct image_type_params *tparams, uint8_t ver)
Charles Manning832472a2014-03-06 15:40:50 +1300402{
403 struct stat sbuf;
404
405 if (params->datafile &&
406 stat(params->datafile, &sbuf) == 0 &&
Ley Foon Tan40551cf2021-01-13 18:53:05 +0800407 sbuf.st_size <= (sfp_max_size(ver) - sizeof(uint32_t))) {
Charles Manning832472a2014-03-06 15:40:50 +1300408 data_size = sbuf.st_size;
Marek Vasutcece78f2018-04-15 13:15:33 +0200409 tparams->header_size = sfp_fake_header_size(data_size, ver);
Charles Manning832472a2014-03-06 15:40:50 +1300410 }
411 return 0;
Marek Vasutcece78f2018-04-15 13:15:33 +0200412
Charles Manning832472a2014-03-06 15:40:50 +1300413}
414
Marek Vasutcece78f2018-04-15 13:15:33 +0200415static int socfpgaimage_vrec_header_v0(struct image_tool_params *params,
416 struct image_type_params *tparams)
417{
418 return sfp_vrec_header(params, tparams, 0);
419}
420
421static int socfpgaimage_vrec_header_v1(struct image_tool_params *params,
422 struct image_type_params *tparams)
423{
424 return sfp_vrec_header(params, tparams, 1);
425}
426
Ley Foon Tan1d0dc5b2020-09-22 10:19:44 +0800427static void sfp_set_header(void *ptr, unsigned char ver,
428 struct image_tool_params *params)
Charles Manning832472a2014-03-06 15:40:50 +1300429{
430 uint8_t *buf = (uint8_t *)ptr;
431
432 /*
433 * This function is called after vrec_header() has been called.
Marek Vasutcece78f2018-04-15 13:15:33 +0200434 * At this stage we have the sfp_fake_header_size() dummy bytes
Ley Foon Tan40551cf2021-01-13 18:53:05 +0800435 * followed by data_size image bytes.
Charles Manning832472a2014-03-06 15:40:50 +1300436 * We need to fix the buffer by moving the image bytes back to
437 * the beginning of the buffer, then actually do the signing stuff...
438 */
Marek Vasutcece78f2018-04-15 13:15:33 +0200439 memmove(buf, buf + sfp_fake_header_size(data_size, ver), data_size);
440 memset(buf + data_size, 0, sfp_fake_header_size(data_size, ver));
Charles Manning832472a2014-03-06 15:40:50 +1300441
Ley Foon Tan1d0dc5b2020-09-22 10:19:44 +0800442 sfp_sign_buffer(buf, ver, 0, data_size, 0, params);
Marek Vasutcece78f2018-04-15 13:15:33 +0200443}
444
445static void socfpgaimage_set_header_v0(void *ptr, struct stat *sbuf, int ifd,
446 struct image_tool_params *params)
447{
Ley Foon Tan1d0dc5b2020-09-22 10:19:44 +0800448 sfp_set_header(ptr, 0, params);
Marek Vasutcece78f2018-04-15 13:15:33 +0200449}
450
451static void socfpgaimage_set_header_v1(void *ptr, struct stat *sbuf, int ifd,
452 struct image_tool_params *params)
453{
Ley Foon Tan1d0dc5b2020-09-22 10:19:44 +0800454 sfp_set_header(ptr, 1, params);
Charles Manning832472a2014-03-06 15:40:50 +1300455}
456
Guilherme Maciel Ferreiraa93648d2015-01-15 02:48:07 -0200457U_BOOT_IMAGE_TYPE(
458 socfpgaimage,
Marek Vasutcece78f2018-04-15 13:15:33 +0200459 "Altera SoCFPGA Cyclone V / Arria V image support",
Guilherme Maciel Ferreiraa93648d2015-01-15 02:48:07 -0200460 0, /* This will be modified by vrec_header() */
Marek Vasutcece78f2018-04-15 13:15:33 +0200461 (void *)buffer_v0,
Ley Foon Tan963e17a2020-09-09 11:34:30 +0800462 socfpgaimage_check_params_v0,
Guilherme Maciel Ferreiraa93648d2015-01-15 02:48:07 -0200463 socfpgaimage_verify_header,
464 socfpgaimage_print_header,
Marek Vasutcece78f2018-04-15 13:15:33 +0200465 socfpgaimage_set_header_v0,
Guilherme Maciel Ferreiraa93648d2015-01-15 02:48:07 -0200466 NULL,
Marek Vasutcece78f2018-04-15 13:15:33 +0200467 socfpgaimage_check_image_types_v0,
Guilherme Maciel Ferreiraa93648d2015-01-15 02:48:07 -0200468 NULL,
Marek Vasutcece78f2018-04-15 13:15:33 +0200469 socfpgaimage_vrec_header_v0
470);
471
472U_BOOT_IMAGE_TYPE(
473 socfpgaimage_v1,
474 "Altera SoCFPGA Arria10 image support",
475 0, /* This will be modified by vrec_header() */
476 (void *)buffer_v1,
Ley Foon Tan963e17a2020-09-09 11:34:30 +0800477 socfpgaimage_check_params_v1,
Marek Vasutcece78f2018-04-15 13:15:33 +0200478 socfpgaimage_verify_header,
479 socfpgaimage_print_header,
480 socfpgaimage_set_header_v1,
481 NULL,
482 socfpgaimage_check_image_types_v1,
483 NULL,
484 socfpgaimage_vrec_header_v1
Guilherme Maciel Ferreiraa93648d2015-01-15 02:48:07 -0200485);