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wdenkc6097192002-11-03 00:24:07 +00001/*
wdenk1a344f22005-02-03 23:00:49 +00002 * (C) Copyright 2000-2005
wdenkc6097192002-11-03 00:24:07 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25/*
26 * IDE support
27 */
28#include <common.h>
29#include <config.h>
30#include <watchdog.h>
31#include <command.h>
32#include <image.h>
33#include <asm/byteorder.h>
Grant Likely735dd972007-02-20 09:04:34 +010034
wdenkc6097192002-11-03 00:24:07 +000035#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
36# include <pcmcia.h>
37#endif
Grant Likely735dd972007-02-20 09:04:34 +010038
wdenkc6097192002-11-03 00:24:07 +000039#ifdef CONFIG_8xx
40# include <mpc8xx.h>
41#endif
Grant Likely735dd972007-02-20 09:04:34 +010042
wdenk132ba5f2004-02-27 08:20:54 +000043#ifdef CONFIG_MPC5xxx
44#include <mpc5xxx.h>
45#endif
Grant Likely735dd972007-02-20 09:04:34 +010046
wdenkc6097192002-11-03 00:24:07 +000047#include <ide.h>
48#include <ata.h>
Grant Likely735dd972007-02-20 09:04:34 +010049
wdenkc6097192002-11-03 00:24:07 +000050#ifdef CONFIG_STATUS_LED
51# include <status_led.h>
52#endif
Grant Likely735dd972007-02-20 09:04:34 +010053
wdenk15647dc2003-10-09 19:00:25 +000054#ifndef __PPC__
wdenk2262cfe2002-11-18 00:14:45 +000055#include <asm/io.h>
wdenk15647dc2003-10-09 19:00:25 +000056#ifdef __MIPS__
57/* Macros depend on this variable */
Wolfgang Denkc75eba32005-12-01 02:15:07 +010058unsigned long mips_io_port_base = 0;
wdenk15647dc2003-10-09 19:00:25 +000059#endif
wdenk2262cfe2002-11-18 00:14:45 +000060#endif
wdenkc6097192002-11-03 00:24:07 +000061
Wolfgang Denkd87080b2006-03-31 18:32:53 +020062#ifdef CONFIG_IDE_8xx_DIRECT
63DECLARE_GLOBAL_DATA_PTR;
64#endif
65
wdenk5cf91d62004-04-23 20:32:05 +000066#ifdef __PPC__
67# define EIEIO __asm__ volatile ("eieio")
wdenk1a344f22005-02-03 23:00:49 +000068# define SYNC __asm__ volatile ("sync")
wdenk5cf91d62004-04-23 20:32:05 +000069#else
70# define EIEIO /* nothing */
wdenk1a344f22005-02-03 23:00:49 +000071# define SYNC /* nothing */
wdenkc6097192002-11-03 00:24:07 +000072#endif
73
Jon Loeligerc76fe472007-07-08 18:02:23 -050074#if defined(CONFIG_CMD_IDE)
wdenkc6097192002-11-03 00:24:07 +000075
wdenk15647dc2003-10-09 19:00:25 +000076#ifdef CONFIG_IDE_8xx_DIRECT
wdenkc6097192002-11-03 00:24:07 +000077/* Timings for IDE Interface
78 *
79 * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
80 * 70 165 30 PIO-Mode 0, [ns]
81 * 4 9 2 [Cycles]
82 * 50 125 20 PIO-Mode 1, [ns]
83 * 3 7 2 [Cycles]
84 * 30 100 15 PIO-Mode 2, [ns]
85 * 2 6 1 [Cycles]
86 * 30 80 10 PIO-Mode 3, [ns]
87 * 2 5 1 [Cycles]
88 * 25 70 10 PIO-Mode 4, [ns]
89 * 2 4 1 [Cycles]
90 */
91
92const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
93{
94 /* Setup Length Hold */
95 { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
96 { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
97 { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
98 { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
99 { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
100};
101
102static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
103
104#ifndef CFG_PIO_MODE
105#define CFG_PIO_MODE 0 /* use a relaxed default */
106#endif
107static int pio_mode = CFG_PIO_MODE;
108
109/* Make clock cycles and always round up */
110
111#define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
112
wdenk15647dc2003-10-09 19:00:25 +0000113#endif /* CONFIG_IDE_8xx_DIRECT */
114
wdenkc6097192002-11-03 00:24:07 +0000115/* ------------------------------------------------------------------------- */
116
117/* Current I/O Device */
118static int curr_device = -1;
119
120/* Current offset for IDE0 / IDE1 bus access */
121ulong ide_bus_offset[CFG_IDE_MAXBUS] = {
122#if defined(CFG_ATA_IDE0_OFFSET)
123 CFG_ATA_IDE0_OFFSET,
124#endif
125#if defined(CFG_ATA_IDE1_OFFSET) && (CFG_IDE_MAXBUS > 1)
126 CFG_ATA_IDE1_OFFSET,
127#endif
128};
129
wdenk15647dc2003-10-09 19:00:25 +0000130
wdenkc6097192002-11-03 00:24:07 +0000131#define ATA_CURR_BASE(dev) (CFG_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)])
132
wdenkc7de8292002-11-19 11:04:11 +0000133#ifndef CONFIG_AMIGAONEG3SE
wdenk1a344f22005-02-03 23:00:49 +0000134static int ide_bus_ok[CFG_IDE_MAXBUS];
wdenkc7de8292002-11-19 11:04:11 +0000135#else
wdenk1a344f22005-02-03 23:00:49 +0000136static int ide_bus_ok[CFG_IDE_MAXBUS] = {0,};
wdenkc7de8292002-11-19 11:04:11 +0000137#endif
wdenkc6097192002-11-03 00:24:07 +0000138
stroesefa838872004-12-16 17:40:30 +0000139block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE];
wdenkc6097192002-11-03 00:24:07 +0000140/* ------------------------------------------------------------------------- */
141
142#ifdef CONFIG_IDE_LED
wdenke2ffd592004-12-31 09:32:47 +0000143#if !defined(CONFIG_KUP4K) && !defined(CONFIG_KUP4X) &&!defined(CONFIG_BMS2003) &&!defined(CONFIG_CPC45)
wdenkc6097192002-11-03 00:24:07 +0000144static void ide_led (uchar led, uchar status);
145#else
wdenk1f53a412002-12-04 23:39:58 +0000146extern void ide_led (uchar led, uchar status);
147#endif
148#else
wdenkc7de8292002-11-19 11:04:11 +0000149#ifndef CONFIG_AMIGAONEG3SE
wdenkc6097192002-11-03 00:24:07 +0000150#define ide_led(a,b) /* dummy */
wdenkc7de8292002-11-19 11:04:11 +0000151#else
152extern void ide_led(uchar led, uchar status);
153#define LED_IDE1 1
154#define LED_IDE2 2
155#define CONFIG_IDE_LED 1
156#define DEVICE_LED(x) 1
157#endif
wdenkc6097192002-11-03 00:24:07 +0000158#endif
159
160#ifdef CONFIG_IDE_RESET
161static void ide_reset (void);
162#else
163#define ide_reset() /* dummy */
164#endif
165
166static void ide_ident (block_dev_desc_t *dev_desc);
167static uchar ide_wait (int dev, ulong t);
168
169#define IDE_TIME_OUT 2000 /* 2 sec timeout */
170
171#define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
172
173#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
174
wdenk2262cfe2002-11-18 00:14:45 +0000175static void __inline__ ide_outb(int dev, int port, unsigned char val);
176static unsigned char __inline__ ide_inb(int dev, int port);
wdenkc6097192002-11-03 00:24:07 +0000177static void input_data(int dev, ulong *sect_buf, int words);
178static void output_data(int dev, ulong *sect_buf, int words);
179static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
180
Heiko Schocher566a4942007-06-22 19:11:54 +0200181#ifndef CFG_ATA_PORT_ADDR
182#define CFG_ATA_PORT_ADDR(port) (port)
183#endif
wdenkc6097192002-11-03 00:24:07 +0000184
185#ifdef CONFIG_ATAPI
186static void atapi_inquiry(block_dev_desc_t *dev_desc);
Grant Likelyeb867a72007-02-20 09:05:45 +0100187ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
wdenkc6097192002-11-03 00:24:07 +0000188#endif
189
190
191#ifdef CONFIG_IDE_8xx_DIRECT
192static void set_pcmcia_timing (int pmode);
wdenkc6097192002-11-03 00:24:07 +0000193#endif
194
195/* ------------------------------------------------------------------------- */
196
197int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
198{
199 int rcode = 0;
200
201 switch (argc) {
202 case 0:
203 case 1:
204 printf ("Usage:\n%s\n", cmdtp->usage);
205 return 1;
206 case 2:
207 if (strncmp(argv[1],"res",3) == 0) {
208 puts ("\nReset IDE"
209#ifdef CONFIG_IDE_8xx_DIRECT
210 " on PCMCIA " PCMCIA_SLOT_MSG
211#endif
212 ": ");
213
214 ide_init ();
215 return 0;
216 } else if (strncmp(argv[1],"inf",3) == 0) {
217 int i;
218
219 putc ('\n');
220
221 for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
222 if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
223 continue; /* list only known devices */
224 printf ("IDE device %d: ", i);
225 dev_print(&ide_dev_desc[i]);
226 }
227 return 0;
228
229 } else if (strncmp(argv[1],"dev",3) == 0) {
230 if ((curr_device < 0) || (curr_device >= CFG_IDE_MAXDEVICE)) {
231 puts ("\nno IDE devices available\n");
232 return 1;
233 }
234 printf ("\nIDE device %d: ", curr_device);
235 dev_print(&ide_dev_desc[curr_device]);
236 return 0;
237 } else if (strncmp(argv[1],"part",4) == 0) {
238 int dev, ok;
239
240 for (ok=0, dev=0; dev<CFG_IDE_MAXDEVICE; ++dev) {
241 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
242 ++ok;
243 if (dev)
244 putc ('\n');
245 print_part(&ide_dev_desc[dev]);
246 }
247 }
248 if (!ok) {
249 puts ("\nno IDE devices available\n");
250 rcode ++;
251 }
252 return rcode;
253 }
254 printf ("Usage:\n%s\n", cmdtp->usage);
255 return 1;
256 case 3:
257 if (strncmp(argv[1],"dev",3) == 0) {
258 int dev = (int)simple_strtoul(argv[2], NULL, 10);
259
260 printf ("\nIDE device %d: ", dev);
261 if (dev >= CFG_IDE_MAXDEVICE) {
262 puts ("unknown device\n");
263 return 1;
264 }
265 dev_print(&ide_dev_desc[dev]);
266 /*ide_print (dev);*/
267
268 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
269 return 1;
270 }
271
272 curr_device = dev;
273
274 puts ("... is now current device\n");
275
276 return 0;
277 } else if (strncmp(argv[1],"part",4) == 0) {
278 int dev = (int)simple_strtoul(argv[2], NULL, 10);
279
280 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
281 print_part(&ide_dev_desc[dev]);
282 } else {
283 printf ("\nIDE device %d not available\n", dev);
284 rcode = 1;
285 }
286 return rcode;
287#if 0
288 } else if (strncmp(argv[1],"pio",4) == 0) {
289 int mode = (int)simple_strtoul(argv[2], NULL, 10);
290
291 if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
292 puts ("\nSetting ");
293 pio_mode = mode;
294 ide_init ();
295 } else {
296 printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
297 mode, IDE_MAX_PIO_MODE);
298 }
299 return;
300#endif
301 }
302
303 printf ("Usage:\n%s\n", cmdtp->usage);
304 return 1;
305 default:
306 /* at least 4 args */
307
308 if (strcmp(argv[1],"read") == 0) {
309 ulong addr = simple_strtoul(argv[2], NULL, 16);
wdenkc6097192002-11-03 00:24:07 +0000310 ulong cnt = simple_strtoul(argv[4], NULL, 16);
311 ulong n;
wdenk42dfe7a2004-03-14 22:25:36 +0000312#ifdef CFG_64BIT_STRTOUL
313 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
wdenkc6097192002-11-03 00:24:07 +0000314
wdenkc40b2952004-03-13 23:29:43 +0000315 printf ("\nIDE read: device %d block # %qd, count %ld ... ",
wdenkc6097192002-11-03 00:24:07 +0000316 curr_device, blk, cnt);
wdenk42dfe7a2004-03-14 22:25:36 +0000317#else
318 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
319
320 printf ("\nIDE read: device %d block # %ld, count %ld ... ",
321 curr_device, blk, cnt);
322#endif
wdenkc6097192002-11-03 00:24:07 +0000323
324 n = ide_dev_desc[curr_device].block_read (curr_device,
325 blk, cnt,
326 (ulong *)addr);
327 /* flush cache after read */
328 flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
329
330 printf ("%ld blocks read: %s\n",
331 n, (n==cnt) ? "OK" : "ERROR");
332 if (n==cnt) {
333 return 0;
334 } else {
335 return 1;
336 }
337 } else if (strcmp(argv[1],"write") == 0) {
338 ulong addr = simple_strtoul(argv[2], NULL, 16);
wdenkc6097192002-11-03 00:24:07 +0000339 ulong cnt = simple_strtoul(argv[4], NULL, 16);
340 ulong n;
wdenk42dfe7a2004-03-14 22:25:36 +0000341#ifdef CFG_64BIT_STRTOUL
342 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
wdenkc6097192002-11-03 00:24:07 +0000343
wdenkc40b2952004-03-13 23:29:43 +0000344 printf ("\nIDE write: device %d block # %qd, count %ld ... ",
wdenkc6097192002-11-03 00:24:07 +0000345 curr_device, blk, cnt);
wdenk42dfe7a2004-03-14 22:25:36 +0000346#else
347 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
348
349 printf ("\nIDE write: device %d block # %ld, count %ld ... ",
350 curr_device, blk, cnt);
351#endif
wdenkc6097192002-11-03 00:24:07 +0000352
353 n = ide_write (curr_device, blk, cnt, (ulong *)addr);
354
355 printf ("%ld blocks written: %s\n",
356 n, (n==cnt) ? "OK" : "ERROR");
357 if (n==cnt) {
358 return 0;
359 } else {
360 return 1;
361 }
362 } else {
363 printf ("Usage:\n%s\n", cmdtp->usage);
364 rcode = 1;
365 }
366
367 return rcode;
368 }
369}
370
371int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
372{
373 char *boot_device = NULL;
374 char *ep;
375 int dev, part = 0;
wdenk1a344f22005-02-03 23:00:49 +0000376 ulong addr, cnt, checksum;
wdenkc6097192002-11-03 00:24:07 +0000377 disk_partition_t info;
378 image_header_t *hdr;
379 int rcode = 0;
380
Heiko Schocherfad63402007-07-13 09:54:17 +0200381 show_boot_progress (41);
wdenkc6097192002-11-03 00:24:07 +0000382 switch (argc) {
383 case 1:
384 addr = CFG_LOAD_ADDR;
385 boot_device = getenv ("bootdevice");
386 break;
387 case 2:
388 addr = simple_strtoul(argv[1], NULL, 16);
389 boot_device = getenv ("bootdevice");
390 break;
391 case 3:
392 addr = simple_strtoul(argv[1], NULL, 16);
393 boot_device = argv[2];
394 break;
395 default:
396 printf ("Usage:\n%s\n", cmdtp->usage);
Heiko Schocherfad63402007-07-13 09:54:17 +0200397 show_boot_progress (-42);
wdenkc6097192002-11-03 00:24:07 +0000398 return 1;
399 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200400 show_boot_progress (42);
wdenkc6097192002-11-03 00:24:07 +0000401
402 if (!boot_device) {
403 puts ("\n** No boot device **\n");
Heiko Schocherfad63402007-07-13 09:54:17 +0200404 show_boot_progress (-43);
wdenkc6097192002-11-03 00:24:07 +0000405 return 1;
406 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200407 show_boot_progress (43);
wdenkc6097192002-11-03 00:24:07 +0000408
409 dev = simple_strtoul(boot_device, &ep, 16);
410
411 if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
412 printf ("\n** Device %d not available\n", dev);
Heiko Schocherfad63402007-07-13 09:54:17 +0200413 show_boot_progress (-44);
wdenkc6097192002-11-03 00:24:07 +0000414 return 1;
415 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200416 show_boot_progress (44);
wdenkc6097192002-11-03 00:24:07 +0000417
418 if (*ep) {
419 if (*ep != ':') {
420 puts ("\n** Invalid boot device, use `dev[:part]' **\n");
Heiko Schocherfad63402007-07-13 09:54:17 +0200421 show_boot_progress (-45);
wdenkc6097192002-11-03 00:24:07 +0000422 return 1;
423 }
424 part = simple_strtoul(++ep, NULL, 16);
425 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200426 show_boot_progress (45);
Denis Peter78827512007-04-13 09:13:33 +0200427 if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
Heiko Schocherfad63402007-07-13 09:54:17 +0200428 show_boot_progress (-46);
wdenkc6097192002-11-03 00:24:07 +0000429 return 1;
430 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200431 show_boot_progress (46);
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200432 if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
433 (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
wdenkc6097192002-11-03 00:24:07 +0000434 printf ("\n** Invalid partition type \"%.32s\""
435 " (expect \"" BOOT_PART_TYPE "\")\n",
436 info.type);
Heiko Schocherfad63402007-07-13 09:54:17 +0200437 show_boot_progress (-47);
wdenkc6097192002-11-03 00:24:07 +0000438 return 1;
439 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200440 show_boot_progress (47);
wdenkc6097192002-11-03 00:24:07 +0000441
442 printf ("\nLoading from IDE device %d, partition %d: "
443 "Name: %.32s Type: %.32s\n",
444 dev, part, info.name, info.type);
445
wdenk1a344f22005-02-03 23:00:49 +0000446 debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
wdenkc6097192002-11-03 00:24:07 +0000447 info.start, info.size, info.blksz);
448
449 if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
450 printf ("** Read error on %d:%d\n", dev, part);
Heiko Schocherfad63402007-07-13 09:54:17 +0200451 show_boot_progress (-48);
wdenkc6097192002-11-03 00:24:07 +0000452 return 1;
453 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200454 show_boot_progress (48);
wdenkc6097192002-11-03 00:24:07 +0000455
456 hdr = (image_header_t *)addr;
457
wdenk1a344f22005-02-03 23:00:49 +0000458 if (ntohl(hdr->ih_magic) != IH_MAGIC) {
wdenkc6097192002-11-03 00:24:07 +0000459 printf("\n** Bad Magic Number **\n");
Heiko Schocherfad63402007-07-13 09:54:17 +0200460 show_boot_progress (-49);
wdenkc6097192002-11-03 00:24:07 +0000461 return 1;
462 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200463 show_boot_progress (49);
wdenkc6097192002-11-03 00:24:07 +0000464
wdenk1a344f22005-02-03 23:00:49 +0000465 checksum = ntohl(hdr->ih_hcrc);
466 hdr->ih_hcrc = 0;
467
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200468 if (crc32 (0, (uchar *)hdr, sizeof(image_header_t)) != checksum) {
wdenk1a344f22005-02-03 23:00:49 +0000469 puts ("\n** Bad Header Checksum **\n");
Heiko Schocherfad63402007-07-13 09:54:17 +0200470 show_boot_progress (-50);
wdenk1a344f22005-02-03 23:00:49 +0000471 return 1;
472 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200473 show_boot_progress (50);
wdenkb9649852005-02-08 15:29:01 +0000474 hdr->ih_hcrc = htonl(checksum); /* restore checksum for later use */
wdenk1a344f22005-02-03 23:00:49 +0000475
476 print_image_hdr (hdr);
477
478 cnt = (ntohl(hdr->ih_size) + sizeof(image_header_t));
479 cnt += info.blksz - 1;
480 cnt /= info.blksz;
481 cnt -= 1;
482
wdenkc6097192002-11-03 00:24:07 +0000483 if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
484 (ulong *)(addr+info.blksz)) != cnt) {
485 printf ("** Read error on %d:%d\n", dev, part);
Heiko Schocherfad63402007-07-13 09:54:17 +0200486 show_boot_progress (-51);
wdenkc6097192002-11-03 00:24:07 +0000487 return 1;
488 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200489 show_boot_progress (51);
wdenkc6097192002-11-03 00:24:07 +0000490
491
492 /* Loading ok, update default load address */
493
494 load_addr = addr;
495
496 /* Check if we should attempt an auto-start */
497 if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
498 char *local_args[2];
499 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
500
501 local_args[0] = argv[0];
502 local_args[1] = NULL;
503
504 printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
505
506 do_bootm (cmdtp, 0, 1, local_args);
507 rcode = 1;
508 }
509 return rcode;
510}
511
512/* ------------------------------------------------------------------------- */
513
514void ide_init (void)
515{
wdenkc6097192002-11-03 00:24:07 +0000516
517#ifdef CONFIG_IDE_8xx_DIRECT
518 volatile immap_t *immr = (immap_t *)CFG_IMMR;
519 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
520#endif
521 unsigned char c;
522 int i, bus;
Wolfgang Denk51056dd2007-04-11 17:22:55 +0200523#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
Wolfgang Denk9045f332007-06-08 10:24:58 +0200524 unsigned int ata_reset_time = ATA_RESET_TIME;
525 char *s;
Wolfgang Denk51056dd2007-04-11 17:22:55 +0200526#endif
wdenkc7de8292002-11-19 11:04:11 +0000527#ifdef CONFIG_AMIGAONEG3SE
528 unsigned int max_bus_scan;
wdenkc7de8292002-11-19 11:04:11 +0000529#endif
wdenk9fd5e312003-12-07 23:55:12 +0000530#ifdef CONFIG_IDE_8xx_PCCARD
531 extern int pcmcia_on (void);
532 extern int ide_devices_found; /* Initialized in check_ide_device() */
533#endif /* CONFIG_IDE_8xx_PCCARD */
534
535#ifdef CONFIG_IDE_PREINIT
wdenk4d13cba2004-03-14 14:09:05 +0000536 extern int ide_preinit (void);
wdenk9fd5e312003-12-07 23:55:12 +0000537 WATCHDOG_RESET();
538
539 if (ide_preinit ()) {
540 puts ("ide_preinit failed\n");
541 return;
542 }
543#endif /* CONFIG_IDE_PREINIT */
wdenkc6097192002-11-03 00:24:07 +0000544
545#ifdef CONFIG_IDE_8xx_PCCARD
546 extern int pcmcia_on (void);
wdenk6069ff22003-02-28 00:49:47 +0000547 extern int ide_devices_found; /* Initialized in check_ide_device() */
wdenkc6097192002-11-03 00:24:07 +0000548
549 WATCHDOG_RESET();
550
wdenk6069ff22003-02-28 00:49:47 +0000551 ide_devices_found = 0;
wdenkc6097192002-11-03 00:24:07 +0000552 /* initialize the PCMCIA IDE adapter card */
wdenk6069ff22003-02-28 00:49:47 +0000553 pcmcia_on();
554 if (!ide_devices_found)
wdenkc6097192002-11-03 00:24:07 +0000555 return;
556 udelay (1000000); /* 1 s */
557#endif /* CONFIG_IDE_8xx_PCCARD */
558
559 WATCHDOG_RESET();
560
wdenk15647dc2003-10-09 19:00:25 +0000561#ifdef CONFIG_IDE_8xx_DIRECT
wdenkc6097192002-11-03 00:24:07 +0000562 /* Initialize PIO timing tables */
563 for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
wdenk1a344f22005-02-03 23:00:49 +0000564 pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
565 gd->bus_clk);
566 pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
567 gd->bus_clk);
568 pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
569 gd->bus_clk);
570 debug ( "PIO Mode %d: setup=%2d ns/%d clk"
571 " len=%3d ns/%d clk"
572 " hold=%2d ns/%d clk\n",
573 i,
574 pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
575 pio_config_ns[i].t_length, pio_config_clk[i].t_length,
576 pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
wdenkc6097192002-11-03 00:24:07 +0000577 }
wdenk15647dc2003-10-09 19:00:25 +0000578#endif /* CONFIG_IDE_8xx_DIRECT */
wdenkc6097192002-11-03 00:24:07 +0000579
580 /* Reset the IDE just to be sure.
581 * Light LED's to show
582 */
583 ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
584 ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
585
586#ifdef CONFIG_IDE_8xx_DIRECT
587 /* PCMCIA / IDE initialization for common mem space */
588 pcmp->pcmc_pgcrb = 0;
wdenkc6097192002-11-03 00:24:07 +0000589
590 /* start in PIO mode 0 - most relaxed timings */
591 pio_mode = 0;
592 set_pcmcia_timing (pio_mode);
wdenk15647dc2003-10-09 19:00:25 +0000593#endif /* CONFIG_IDE_8xx_DIRECT */
wdenkc6097192002-11-03 00:24:07 +0000594
595 /*
596 * Wait for IDE to get ready.
597 * According to spec, this can take up to 31 seconds!
598 */
wdenkc7de8292002-11-19 11:04:11 +0000599#ifndef CONFIG_AMIGAONEG3SE
wdenkc6097192002-11-03 00:24:07 +0000600 for (bus=0; bus<CFG_IDE_MAXBUS; ++bus) {
601 int dev = bus * (CFG_IDE_MAXDEVICE / CFG_IDE_MAXBUS);
wdenkc7de8292002-11-19 11:04:11 +0000602#else
603 s = getenv("ide_maxbus");
604 if (s)
wdenk1a344f22005-02-03 23:00:49 +0000605 max_bus_scan = simple_strtol(s, NULL, 10);
wdenkc7de8292002-11-19 11:04:11 +0000606 else
wdenk1a344f22005-02-03 23:00:49 +0000607 max_bus_scan = CFG_IDE_MAXBUS;
wdenkc7de8292002-11-19 11:04:11 +0000608
609 for (bus=0; bus<max_bus_scan; ++bus) {
610 int dev = bus * (CFG_IDE_MAXDEVICE / max_bus_scan);
611#endif
wdenkc6097192002-11-03 00:24:07 +0000612
wdenk6069ff22003-02-28 00:49:47 +0000613#ifdef CONFIG_IDE_8xx_PCCARD
614 /* Skip non-ide devices from probing */
615 if ((ide_devices_found & (1 << bus)) == 0) {
616 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
617 continue;
618 }
619#endif
wdenkc6097192002-11-03 00:24:07 +0000620 printf ("Bus %d: ", bus);
621
622 ide_bus_ok[bus] = 0;
623
624 /* Select device
625 */
626 udelay (100000); /* 100 ms */
wdenk2262cfe2002-11-18 00:14:45 +0000627 ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
wdenkc6097192002-11-03 00:24:07 +0000628 udelay (100000); /* 100 ms */
Wolfgang Denk51056dd2007-04-11 17:22:55 +0200629#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
630 if ((s = getenv("ide_reset_timeout")) != NULL)
631 ata_reset_time = simple_strtol(s, NULL, 10);
wdenkc7de8292002-11-19 11:04:11 +0000632#endif
wdenkc6097192002-11-03 00:24:07 +0000633 i = 0;
634 do {
635 udelay (10000); /* 10 ms */
636
wdenk2262cfe2002-11-18 00:14:45 +0000637 c = ide_inb (dev, ATA_STATUS);
wdenkc6097192002-11-03 00:24:07 +0000638 i++;
Wolfgang Denk51056dd2007-04-11 17:22:55 +0200639#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
wdenkc7de8292002-11-19 11:04:11 +0000640 if (i > (ata_reset_time * 100)) {
641#else
wdenkc6097192002-11-03 00:24:07 +0000642 if (i > (ATA_RESET_TIME * 100)) {
wdenkc7de8292002-11-19 11:04:11 +0000643#endif
wdenkc6097192002-11-03 00:24:07 +0000644 puts ("** Timeout **\n");
645 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
wdenkc7de8292002-11-19 11:04:11 +0000646#ifdef CONFIG_AMIGAONEG3SE
647 /* If this is the second bus, the first one was OK */
wdenkc40b2952004-03-13 23:29:43 +0000648 if (bus != 0) {
wdenk1a344f22005-02-03 23:00:49 +0000649 ide_bus_ok[bus] = 0;
650 goto skip_bus;
wdenkc7de8292002-11-19 11:04:11 +0000651 }
652#endif
wdenkc6097192002-11-03 00:24:07 +0000653 return;
654 }
655 if ((i >= 100) && ((i%100)==0)) {
656 putc ('.');
657 }
658 } while (c & ATA_STAT_BUSY);
659
660 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
661 puts ("not available ");
wdenk1a344f22005-02-03 23:00:49 +0000662 debug ("Status = 0x%02X ", c);
wdenkc6097192002-11-03 00:24:07 +0000663#ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
664 } else if ((c & ATA_STAT_READY) == 0) {
665 puts ("not available ");
wdenk1a344f22005-02-03 23:00:49 +0000666 debug ("Status = 0x%02X ", c);
wdenkc6097192002-11-03 00:24:07 +0000667#endif
668 } else {
669 puts ("OK ");
670 ide_bus_ok[bus] = 1;
671 }
672 WATCHDOG_RESET();
673 }
wdenkc7de8292002-11-19 11:04:11 +0000674
675#ifdef CONFIG_AMIGAONEG3SE
676 skip_bus:
677#endif
wdenkc6097192002-11-03 00:24:07 +0000678 putc ('\n');
679
680 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
681
682 curr_device = -1;
683 for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
684#ifdef CONFIG_IDE_LED
685 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
686#endif
wdenk5cf9da42003-11-07 13:42:26 +0000687 ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
wdenkc6097192002-11-03 00:24:07 +0000688 ide_dev_desc[i].if_type=IF_TYPE_IDE;
689 ide_dev_desc[i].dev=i;
690 ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
691 ide_dev_desc[i].blksz=0;
692 ide_dev_desc[i].lba=0;
693 ide_dev_desc[i].block_read=ide_read;
694 if (!ide_bus_ok[IDE_BUS(i)])
695 continue;
696 ide_led (led, 1); /* LED on */
697 ide_ident(&ide_dev_desc[i]);
698 ide_led (led, 0); /* LED off */
699 dev_print(&ide_dev_desc[i]);
700/* ide_print (i); */
701 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
702 init_part (&ide_dev_desc[i]); /* initialize partition type */
703 if (curr_device < 0)
704 curr_device = i;
705 }
706 }
707 WATCHDOG_RESET();
708}
709
710/* ------------------------------------------------------------------------- */
711
712block_dev_desc_t * ide_get_dev(int dev)
713{
Grant Likely735dd972007-02-20 09:04:34 +0100714 return (dev < CFG_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
wdenkc6097192002-11-03 00:24:07 +0000715}
716
717
718#ifdef CONFIG_IDE_8xx_DIRECT
719
720static void
721set_pcmcia_timing (int pmode)
722{
723 volatile immap_t *immr = (immap_t *)CFG_IMMR;
724 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
725 ulong timings;
726
wdenk1a344f22005-02-03 23:00:49 +0000727 debug ("Set timing for PIO Mode %d\n", pmode);
wdenkc6097192002-11-03 00:24:07 +0000728
729 timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
730 | PCMCIA_SST(pio_config_clk[pmode].t_setup)
731 | PCMCIA_SL (pio_config_clk[pmode].t_length)
732 ;
733
734 /* IDE 0
735 */
736 pcmp->pcmc_pbr0 = CFG_PCMCIA_PBR0;
737 pcmp->pcmc_por0 = CFG_PCMCIA_POR0
738#if (CFG_PCMCIA_POR0 != 0)
739 | timings
740#endif
741 ;
wdenk1a344f22005-02-03 23:00:49 +0000742 debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
wdenkc6097192002-11-03 00:24:07 +0000743
744 pcmp->pcmc_pbr1 = CFG_PCMCIA_PBR1;
745 pcmp->pcmc_por1 = CFG_PCMCIA_POR1
746#if (CFG_PCMCIA_POR1 != 0)
747 | timings
748#endif
749 ;
wdenk1a344f22005-02-03 23:00:49 +0000750 debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
wdenkc6097192002-11-03 00:24:07 +0000751
752 pcmp->pcmc_pbr2 = CFG_PCMCIA_PBR2;
753 pcmp->pcmc_por2 = CFG_PCMCIA_POR2
754#if (CFG_PCMCIA_POR2 != 0)
755 | timings
756#endif
757 ;
wdenk1a344f22005-02-03 23:00:49 +0000758 debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
wdenkc6097192002-11-03 00:24:07 +0000759
760 pcmp->pcmc_pbr3 = CFG_PCMCIA_PBR3;
761 pcmp->pcmc_por3 = CFG_PCMCIA_POR3
762#if (CFG_PCMCIA_POR3 != 0)
763 | timings
764#endif
765 ;
wdenk1a344f22005-02-03 23:00:49 +0000766 debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
wdenkc6097192002-11-03 00:24:07 +0000767
768 /* IDE 1
769 */
770 pcmp->pcmc_pbr4 = CFG_PCMCIA_PBR4;
771 pcmp->pcmc_por4 = CFG_PCMCIA_POR4
772#if (CFG_PCMCIA_POR4 != 0)
773 | timings
774#endif
775 ;
wdenk1a344f22005-02-03 23:00:49 +0000776 debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
wdenkc6097192002-11-03 00:24:07 +0000777
778 pcmp->pcmc_pbr5 = CFG_PCMCIA_PBR5;
779 pcmp->pcmc_por5 = CFG_PCMCIA_POR5
780#if (CFG_PCMCIA_POR5 != 0)
781 | timings
782#endif
783 ;
wdenk1a344f22005-02-03 23:00:49 +0000784 debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
wdenkc6097192002-11-03 00:24:07 +0000785
786 pcmp->pcmc_pbr6 = CFG_PCMCIA_PBR6;
787 pcmp->pcmc_por6 = CFG_PCMCIA_POR6
788#if (CFG_PCMCIA_POR6 != 0)
789 | timings
790#endif
791 ;
wdenk1a344f22005-02-03 23:00:49 +0000792 debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
wdenkc6097192002-11-03 00:24:07 +0000793
794 pcmp->pcmc_pbr7 = CFG_PCMCIA_PBR7;
795 pcmp->pcmc_por7 = CFG_PCMCIA_POR7
796#if (CFG_PCMCIA_POR7 != 0)
797 | timings
798#endif
799 ;
wdenk1a344f22005-02-03 23:00:49 +0000800 debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
wdenkc6097192002-11-03 00:24:07 +0000801
802}
803
804#endif /* CONFIG_IDE_8xx_DIRECT */
805
806/* ------------------------------------------------------------------------- */
807
wdenkdb01a2e2004-04-15 23:14:49 +0000808#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
wdenkc6097192002-11-03 00:24:07 +0000809static void __inline__
wdenk2262cfe2002-11-18 00:14:45 +0000810ide_outb(int dev, int port, unsigned char val)
wdenkc6097192002-11-03 00:24:07 +0000811{
wdenk1a344f22005-02-03 23:00:49 +0000812 debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
wdenk9fd5e312003-12-07 23:55:12 +0000813 dev, port, val, (ATA_CURR_BASE(dev)+port));
wdenkd4ca31c2004-01-02 14:00:00 +0000814
wdenkc6097192002-11-03 00:24:07 +0000815 /* Ensure I/O operations complete */
wdenk5cf91d62004-04-23 20:32:05 +0000816 EIEIO;
Heiko Schocher566a4942007-06-22 19:11:54 +0200817 *((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))) = val;
wdenkc6097192002-11-03 00:24:07 +0000818}
wdenk2262cfe2002-11-18 00:14:45 +0000819#else /* ! __PPC__ */
820static void __inline__
821ide_outb(int dev, int port, unsigned char val)
822{
Heiko Schocher566a4942007-06-22 19:11:54 +0200823 outb(val, ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port));
wdenk2262cfe2002-11-18 00:14:45 +0000824}
825#endif /* __PPC__ */
wdenkc6097192002-11-03 00:24:07 +0000826
wdenk2262cfe2002-11-18 00:14:45 +0000827
wdenkdb01a2e2004-04-15 23:14:49 +0000828#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
wdenkc6097192002-11-03 00:24:07 +0000829static unsigned char __inline__
wdenk2262cfe2002-11-18 00:14:45 +0000830ide_inb(int dev, int port)
wdenkc6097192002-11-03 00:24:07 +0000831{
832 uchar val;
833 /* Ensure I/O operations complete */
wdenk5cf91d62004-04-23 20:32:05 +0000834 EIEIO;
Heiko Schocher566a4942007-06-22 19:11:54 +0200835 val = *((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
wdenk1a344f22005-02-03 23:00:49 +0000836 debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
wdenk9fd5e312003-12-07 23:55:12 +0000837 dev, port, (ATA_CURR_BASE(dev)+port), val);
wdenkc6097192002-11-03 00:24:07 +0000838 return (val);
839}
wdenk2262cfe2002-11-18 00:14:45 +0000840#else /* ! __PPC__ */
841static unsigned char __inline__
842ide_inb(int dev, int port)
843{
Heiko Schocher566a4942007-06-22 19:11:54 +0200844 return inb(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port));
wdenk2262cfe2002-11-18 00:14:45 +0000845}
846#endif /* __PPC__ */
wdenkc6097192002-11-03 00:24:07 +0000847
wdenk2262cfe2002-11-18 00:14:45 +0000848#ifdef __PPC__
wdenkcceb8712003-06-23 18:12:28 +0000849# ifdef CONFIG_AMIGAONEG3SE
wdenkc7de8292002-11-19 11:04:11 +0000850static void
851output_data_short(int dev, ulong *sect_buf, int words)
852{
853 ushort *dbuf;
854 volatile ushort *pbuf;
wdenk8bde7f72003-06-27 21:31:46 +0000855
wdenkc7de8292002-11-19 11:04:11 +0000856 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
857 dbuf = (ushort *)sect_buf;
858 while (words--) {
wdenk5cf91d62004-04-23 20:32:05 +0000859 EIEIO;
wdenkc7de8292002-11-19 11:04:11 +0000860 *pbuf = *dbuf++;
wdenk5cf91d62004-04-23 20:32:05 +0000861 EIEIO;
wdenkc7de8292002-11-19 11:04:11 +0000862 }
863
864 if (words&1)
wdenk1a344f22005-02-03 23:00:49 +0000865 *pbuf = 0;
wdenkc7de8292002-11-19 11:04:11 +0000866}
wdenkcceb8712003-06-23 18:12:28 +0000867# endif /* CONFIG_AMIGAONEG3SE */
wdenk5da627a2003-10-09 20:09:04 +0000868#endif /* __PPC_ */
wdenkc7de8292002-11-19 11:04:11 +0000869
wdenk5da627a2003-10-09 20:09:04 +0000870/* We only need to swap data if we are running on a big endian cpu. */
871/* But Au1x00 cpu:s already swaps data in big endian mode! */
Wolfgang Denk0c32d962006-06-16 17:32:31 +0200872#if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
wdenk5da627a2003-10-09 20:09:04 +0000873#define input_swap_data(x,y,z) input_data(x,y,z)
874#else
wdenkc6097192002-11-03 00:24:07 +0000875static void
876input_swap_data(int dev, ulong *sect_buf, int words)
877{
wdenk1a344f22005-02-03 23:00:49 +0000878#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
wdenka522fa02004-01-04 22:51:12 +0000879 uchar i;
880 volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
881 volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
882 ushort *dbuf = (ushort *)sect_buf;
883
884 while (words--) {
885 for (i=0; i<2; i++) {
886 *(((uchar *)(dbuf)) + 1) = *pbuf_even;
887 *(uchar *)dbuf = *pbuf_odd;
888 dbuf+=1;
889 }
890 }
wdenkf4733a02005-03-06 01:21:30 +0000891#else
wdenk1a344f22005-02-03 23:00:49 +0000892 volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
893 ushort *dbuf = (ushort *)sect_buf;
894
895 debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
896
897 while (words--) {
Wolfgang Denk0c32d962006-06-16 17:32:31 +0200898#ifdef __MIPS__
899 *dbuf++ = swab16p((u16*)pbuf);
900 *dbuf++ = swab16p((u16*)pbuf);
Heiko Schocher566a4942007-06-22 19:11:54 +0200901#elif defined(CONFIG_PCS440EP)
902 *dbuf++ = *pbuf;
903 *dbuf++ = *pbuf;
Wolfgang Denk0c32d962006-06-16 17:32:31 +0200904#else
wdenk1a344f22005-02-03 23:00:49 +0000905 *dbuf++ = ld_le16(pbuf);
906 *dbuf++ = ld_le16(pbuf);
Wolfgang Denk0c32d962006-06-16 17:32:31 +0200907#endif /* !MIPS */
wdenk1a344f22005-02-03 23:00:49 +0000908 }
909#endif
wdenkc6097192002-11-03 00:24:07 +0000910}
wdenk5da627a2003-10-09 20:09:04 +0000911#endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
wdenkc6097192002-11-03 00:24:07 +0000912
wdenk2262cfe2002-11-18 00:14:45 +0000913
wdenkdb01a2e2004-04-15 23:14:49 +0000914#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
wdenkc6097192002-11-03 00:24:07 +0000915static void
916output_data(int dev, ulong *sect_buf, int words)
917{
wdenk1a344f22005-02-03 23:00:49 +0000918#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
wdenka522fa02004-01-04 22:51:12 +0000919 uchar *dbuf;
920 volatile uchar *pbuf_even;
921 volatile uchar *pbuf_odd;
922
923 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
924 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
925 dbuf = (uchar *)sect_buf;
926 while (words--) {
wdenk5cf91d62004-04-23 20:32:05 +0000927 EIEIO;
wdenka522fa02004-01-04 22:51:12 +0000928 *pbuf_even = *dbuf++;
wdenk5cf91d62004-04-23 20:32:05 +0000929 EIEIO;
wdenka522fa02004-01-04 22:51:12 +0000930 *pbuf_odd = *dbuf++;
wdenk5cf91d62004-04-23 20:32:05 +0000931 EIEIO;
wdenka522fa02004-01-04 22:51:12 +0000932 *pbuf_even = *dbuf++;
wdenk5cf91d62004-04-23 20:32:05 +0000933 EIEIO;
wdenka522fa02004-01-04 22:51:12 +0000934 *pbuf_odd = *dbuf++;
935 }
wdenk1a344f22005-02-03 23:00:49 +0000936#else
937 ushort *dbuf;
938 volatile ushort *pbuf;
939
940 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
941 dbuf = (ushort *)sect_buf;
942 while (words--) {
Heiko Schocher566a4942007-06-22 19:11:54 +0200943#if defined(CONFIG_PCS440EP)
944 /* not tested, because CF was write protected */
945 EIEIO;
946 *pbuf = ld_le16(dbuf++);
947 EIEIO;
948 *pbuf = ld_le16(dbuf++);
949#else
wdenk1a344f22005-02-03 23:00:49 +0000950 EIEIO;
951 *pbuf = *dbuf++;
952 EIEIO;
953 *pbuf = *dbuf++;
Heiko Schocher566a4942007-06-22 19:11:54 +0200954#endif
wdenk1a344f22005-02-03 23:00:49 +0000955 }
956#endif
wdenkc6097192002-11-03 00:24:07 +0000957}
wdenk2262cfe2002-11-18 00:14:45 +0000958#else /* ! __PPC__ */
959static void
960output_data(int dev, ulong *sect_buf, int words)
961{
wdenk15647dc2003-10-09 19:00:25 +0000962 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
wdenk2262cfe2002-11-18 00:14:45 +0000963}
964#endif /* __PPC__ */
wdenkc6097192002-11-03 00:24:07 +0000965
wdenkdb01a2e2004-04-15 23:14:49 +0000966#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
wdenkc6097192002-11-03 00:24:07 +0000967static void
968input_data(int dev, ulong *sect_buf, int words)
969{
wdenk1a344f22005-02-03 23:00:49 +0000970#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
wdenka522fa02004-01-04 22:51:12 +0000971 uchar *dbuf;
972 volatile uchar *pbuf_even;
973 volatile uchar *pbuf_odd;
974
975 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
976 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
977 dbuf = (uchar *)sect_buf;
978 while (words--) {
wdenka522fa02004-01-04 22:51:12 +0000979 *dbuf++ = *pbuf_even;
wdenk5cf91d62004-04-23 20:32:05 +0000980 EIEIO;
wdenk1a344f22005-02-03 23:00:49 +0000981 SYNC;
wdenka522fa02004-01-04 22:51:12 +0000982 *dbuf++ = *pbuf_odd;
wdenk5cf91d62004-04-23 20:32:05 +0000983 EIEIO;
wdenk1a344f22005-02-03 23:00:49 +0000984 SYNC;
wdenka522fa02004-01-04 22:51:12 +0000985 *dbuf++ = *pbuf_even;
wdenk5cf91d62004-04-23 20:32:05 +0000986 EIEIO;
wdenk1a344f22005-02-03 23:00:49 +0000987 SYNC;
wdenka522fa02004-01-04 22:51:12 +0000988 *dbuf++ = *pbuf_odd;
wdenk1a344f22005-02-03 23:00:49 +0000989 EIEIO;
990 SYNC;
wdenka522fa02004-01-04 22:51:12 +0000991 }
wdenk1a344f22005-02-03 23:00:49 +0000992#else
993 ushort *dbuf;
994 volatile ushort *pbuf;
995
996 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
997 dbuf = (ushort *)sect_buf;
998
999 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
1000
1001 while (words--) {
Heiko Schocher566a4942007-06-22 19:11:54 +02001002#if defined(CONFIG_PCS440EP)
1003 EIEIO;
1004 *dbuf++ = ld_le16(pbuf);
1005 EIEIO;
1006 *dbuf++ = ld_le16(pbuf);
1007#else
wdenk1a344f22005-02-03 23:00:49 +00001008 EIEIO;
1009 *dbuf++ = *pbuf;
1010 EIEIO;
1011 *dbuf++ = *pbuf;
Heiko Schocher566a4942007-06-22 19:11:54 +02001012#endif
wdenk1a344f22005-02-03 23:00:49 +00001013 }
1014#endif
wdenkc6097192002-11-03 00:24:07 +00001015}
wdenk2262cfe2002-11-18 00:14:45 +00001016#else /* ! __PPC__ */
1017static void
1018input_data(int dev, ulong *sect_buf, int words)
1019{
wdenk15647dc2003-10-09 19:00:25 +00001020 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
wdenk2262cfe2002-11-18 00:14:45 +00001021}
1022
1023#endif /* __PPC__ */
wdenkc6097192002-11-03 00:24:07 +00001024
wdenkc7de8292002-11-19 11:04:11 +00001025#ifdef CONFIG_AMIGAONEG3SE
1026static void
1027input_data_short(int dev, ulong *sect_buf, int words)
1028{
1029 ushort *dbuf;
1030 volatile ushort *pbuf;
1031
1032 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1033 dbuf = (ushort *)sect_buf;
1034 while (words--) {
wdenk5cf91d62004-04-23 20:32:05 +00001035 EIEIO;
wdenkc7de8292002-11-19 11:04:11 +00001036 *dbuf++ = *pbuf;
wdenk5cf91d62004-04-23 20:32:05 +00001037 EIEIO;
wdenkc7de8292002-11-19 11:04:11 +00001038 }
1039
wdenkc40b2952004-03-13 23:29:43 +00001040 if (words&1) {
wdenk1a344f22005-02-03 23:00:49 +00001041 ushort dummy;
1042 dummy = *pbuf;
wdenkc7de8292002-11-19 11:04:11 +00001043 }
1044}
1045#endif
1046
wdenkc6097192002-11-03 00:24:07 +00001047/* -------------------------------------------------------------------------
1048 */
1049static void ide_ident (block_dev_desc_t *dev_desc)
1050{
1051 ulong iobuf[ATA_SECTORWORDS];
1052 unsigned char c;
1053 hd_driveid_t *iop = (hd_driveid_t *)iobuf;
1054
wdenkc7de8292002-11-19 11:04:11 +00001055#ifdef CONFIG_AMIGAONEG3SE
1056 int max_bus_scan;
wdenkc7de8292002-11-19 11:04:11 +00001057 char *s;
wdenk64f70be2004-09-28 20:34:50 +00001058#endif
1059#ifdef CONFIG_ATAPI
1060 int retries = 0;
wdenkc7de8292002-11-19 11:04:11 +00001061 int do_retry = 0;
1062#endif
1063
wdenkc6097192002-11-03 00:24:07 +00001064#if 0
1065 int mode, cycle_time;
1066#endif
1067 int device;
1068 device=dev_desc->dev;
1069 printf (" Device %d: ", device);
1070
wdenkc7de8292002-11-19 11:04:11 +00001071#ifdef CONFIG_AMIGAONEG3SE
1072 s = getenv("ide_maxbus");
1073 if (s) {
1074 max_bus_scan = simple_strtol(s, NULL, 10);
1075 } else {
1076 max_bus_scan = CFG_IDE_MAXBUS;
1077 }
1078 if (device >= max_bus_scan*2) {
1079 dev_desc->type=DEV_TYPE_UNKNOWN;
1080 return;
1081 }
1082#endif
1083
wdenkc6097192002-11-03 00:24:07 +00001084 ide_led (DEVICE_LED(device), 1); /* LED on */
1085 /* Select device
1086 */
wdenk2262cfe2002-11-18 00:14:45 +00001087 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001088 dev_desc->if_type=IF_TYPE_IDE;
1089#ifdef CONFIG_ATAPI
wdenkc7de8292002-11-19 11:04:11 +00001090
wdenkc7de8292002-11-19 11:04:11 +00001091 do_retry = 0;
1092 retries = 0;
1093
1094 /* Warning: This will be tricky to read */
wdenkc40b2952004-03-13 23:29:43 +00001095 while (retries <= 1) {
wdenkc6097192002-11-03 00:24:07 +00001096 /* check signature */
wdenk2262cfe2002-11-18 00:14:45 +00001097 if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
1098 (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
1099 (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
1100 (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
wdenkc6097192002-11-03 00:24:07 +00001101 /* ATAPI Signature found */
1102 dev_desc->if_type=IF_TYPE_ATAPI;
1103 /* Start Ident Command
1104 */
wdenk2262cfe2002-11-18 00:14:45 +00001105 ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
wdenkc6097192002-11-03 00:24:07 +00001106 /*
1107 * Wait for completion - ATAPI devices need more time
1108 * to become ready
1109 */
1110 c = ide_wait (device, ATAPI_TIME_OUT);
wdenkc40b2952004-03-13 23:29:43 +00001111 } else
wdenkc6097192002-11-03 00:24:07 +00001112#endif
1113 {
1114 /* Start Ident Command
1115 */
wdenk2262cfe2002-11-18 00:14:45 +00001116 ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
wdenkc6097192002-11-03 00:24:07 +00001117
1118 /* Wait for completion
1119 */
1120 c = ide_wait (device, IDE_TIME_OUT);
1121 }
1122 ide_led (DEVICE_LED(device), 0); /* LED off */
1123
1124 if (((c & ATA_STAT_DRQ) == 0) ||
1125 ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
wdenk64f70be2004-09-28 20:34:50 +00001126#ifdef CONFIG_ATAPI
wdenkc7de8292002-11-19 11:04:11 +00001127#ifdef CONFIG_AMIGAONEG3SE
wdenk64f70be2004-09-28 20:34:50 +00001128 s = getenv("ide_doreset");
1129 if (s && strcmp(s, "on") == 0)
1130#endif
wdenk1a344f22005-02-03 23:00:49 +00001131 {
1132 /* Need to soft reset the device in case it's an ATAPI... */
1133 debug ("Retrying...\n");
1134 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1135 udelay(100000);
1136 ide_outb (device, ATA_COMMAND, 0x08);
1137 udelay (500000); /* 500 ms */
1138 }
wdenk64f70be2004-09-28 20:34:50 +00001139 /* Select device
1140 */
1141 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1142 retries++;
wdenkc7de8292002-11-19 11:04:11 +00001143#else
wdenkc6097192002-11-03 00:24:07 +00001144 return;
wdenk64f70be2004-09-28 20:34:50 +00001145#endif
wdenkc6097192002-11-03 00:24:07 +00001146 }
wdenk64f70be2004-09-28 20:34:50 +00001147#ifdef CONFIG_ATAPI
1148 else
1149 break;
wdenkc7de8292002-11-19 11:04:11 +00001150 } /* see above - ugly to read */
wdenk64f70be2004-09-28 20:34:50 +00001151
1152 if (retries == 2) /* Not found */
1153 return;
1154#endif
wdenkc7de8292002-11-19 11:04:11 +00001155
wdenkc6097192002-11-03 00:24:07 +00001156 input_swap_data (device, iobuf, ATA_SECTORWORDS);
1157
1158 ident_cpy (dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
1159 ident_cpy (dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
1160 ident_cpy (dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
wdenkc3f9d492004-03-14 00:59:59 +00001161#ifdef __LITTLE_ENDIAN
1162 /*
1163 * firmware revision and model number have Big Endian Byte
1164 * order in Word. Convert both to little endian.
1165 *
1166 * See CF+ and CompactFlash Specification Revision 2.0:
1167 * 6.2.1.6: Identfy Drive, Table 39 for more details
1168 */
1169
1170 strswab (dev_desc->revision);
1171 strswab (dev_desc->vendor);
1172#endif /* __LITTLE_ENDIAN */
wdenkc6097192002-11-03 00:24:07 +00001173
1174 if ((iop->config & 0x0080)==0x0080)
1175 dev_desc->removable = 1;
1176 else
1177 dev_desc->removable = 0;
1178
1179#if 0
1180 /*
1181 * Drive PIO mode autoselection
1182 */
1183 mode = iop->tPIO;
1184
1185 printf ("tPIO = 0x%02x = %d\n",mode, mode);
1186 if (mode > 2) { /* 2 is maximum allowed tPIO value */
1187 mode = 2;
wdenk1a344f22005-02-03 23:00:49 +00001188 debug ("Override tPIO -> 2\n");
wdenkc6097192002-11-03 00:24:07 +00001189 }
1190 if (iop->field_valid & 2) { /* drive implements ATA2? */
wdenk1a344f22005-02-03 23:00:49 +00001191 debug ("Drive implements ATA2\n");
wdenkc6097192002-11-03 00:24:07 +00001192 if (iop->capability & 8) { /* drive supports use_iordy? */
1193 cycle_time = iop->eide_pio_iordy;
1194 } else {
1195 cycle_time = iop->eide_pio;
1196 }
wdenk1a344f22005-02-03 23:00:49 +00001197 debug ("cycle time = %d\n", cycle_time);
wdenkc6097192002-11-03 00:24:07 +00001198 mode = 4;
1199 if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
1200 if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
1201 if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
1202 if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
1203 }
1204 printf ("PIO mode to use: PIO %d\n", mode);
1205#endif /* 0 */
1206
1207#ifdef CONFIG_ATAPI
1208 if (dev_desc->if_type==IF_TYPE_ATAPI) {
1209 atapi_inquiry(dev_desc);
1210 return;
1211 }
1212#endif /* CONFIG_ATAPI */
1213
wdenkc3f9d492004-03-14 00:59:59 +00001214#ifdef __BIG_ENDIAN
wdenkc6097192002-11-03 00:24:07 +00001215 /* swap shorts */
1216 dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
wdenkc3f9d492004-03-14 00:59:59 +00001217#else /* ! __BIG_ENDIAN */
1218 /*
1219 * do not swap shorts on little endian
1220 *
1221 * See CF+ and CompactFlash Specification Revision 2.0:
1222 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
1223 */
1224 dev_desc->lba = iop->lba_capacity;
1225#endif /* __BIG_ENDIAN */
wdenkc40b2952004-03-13 23:29:43 +00001226
wdenk42dfe7a2004-03-14 22:25:36 +00001227#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001228 if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
wdenk6e592382004-04-18 17:39:38 +00001229 dev_desc->lba48 = 1;
1230 dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
wdenkc40b2952004-03-13 23:29:43 +00001231 ((unsigned long long)iop->lba48_capacity[1] << 16) |
1232 ((unsigned long long)iop->lba48_capacity[2] << 32) |
1233 ((unsigned long long)iop->lba48_capacity[3] << 48);
1234 } else {
wdenkc40b2952004-03-13 23:29:43 +00001235 dev_desc->lba48 = 0;
1236 }
1237#endif /* CONFIG_LBA48 */
wdenkc6097192002-11-03 00:24:07 +00001238 /* assuming HD */
1239 dev_desc->type=DEV_TYPE_HARDDISK;
1240 dev_desc->blksz=ATA_BLOCKSIZE;
1241 dev_desc->lun=0; /* just to fill something in... */
1242
1243#if 0 /* only used to test the powersaving mode,
1244 * if enabled, the drive goes after 5 sec
1245 * in standby mode */
wdenk2262cfe2002-11-18 00:14:45 +00001246 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001247 c = ide_wait (device, IDE_TIME_OUT);
wdenk2262cfe2002-11-18 00:14:45 +00001248 ide_outb (device, ATA_SECT_CNT, 1);
1249 ide_outb (device, ATA_LBA_LOW, 0);
1250 ide_outb (device, ATA_LBA_MID, 0);
1251 ide_outb (device, ATA_LBA_HIGH, 0);
wdenk1a344f22005-02-03 23:00:49 +00001252 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenk2262cfe2002-11-18 00:14:45 +00001253 ide_outb (device, ATA_COMMAND, 0xe3);
wdenkc6097192002-11-03 00:24:07 +00001254 udelay (50);
1255 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1256#endif
1257}
1258
1259
1260/* ------------------------------------------------------------------------- */
1261
Grant Likelyeb867a72007-02-20 09:05:45 +01001262ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
wdenkc6097192002-11-03 00:24:07 +00001263{
1264 ulong n = 0;
1265 unsigned char c;
1266 unsigned char pwrsave=0; /* power save */
wdenk42dfe7a2004-03-14 22:25:36 +00001267#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001268 unsigned char lba48 = 0;
wdenkc6097192002-11-03 00:24:07 +00001269
wdenkc40b2952004-03-13 23:29:43 +00001270 if (blknr & 0x0000fffff0000000) {
1271 /* more than 28 bits used, use 48bit mode */
1272 lba48 = 1;
1273 }
1274#endif
wdenk1a344f22005-02-03 23:00:49 +00001275 debug ("ide_read dev %d start %qX, blocks %lX buffer at %lX\n",
wdenkc6097192002-11-03 00:24:07 +00001276 device, blknr, blkcnt, (ulong)buffer);
1277
1278 ide_led (DEVICE_LED(device), 1); /* LED on */
1279
1280 /* Select device
1281 */
wdenk2262cfe2002-11-18 00:14:45 +00001282 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001283 c = ide_wait (device, IDE_TIME_OUT);
1284
1285 if (c & ATA_STAT_BUSY) {
1286 printf ("IDE read: device %d not ready\n", device);
1287 goto IDE_READ_E;
1288 }
1289
1290 /* first check if the drive is in Powersaving mode, if yes,
1291 * increase the timeout value */
wdenk2262cfe2002-11-18 00:14:45 +00001292 ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
wdenkc6097192002-11-03 00:24:07 +00001293 udelay (50);
1294
1295 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1296
1297 if (c & ATA_STAT_BUSY) {
1298 printf ("IDE read: device %d not ready\n", device);
1299 goto IDE_READ_E;
1300 }
1301 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1302 printf ("No Powersaving mode %X\n", c);
1303 } else {
wdenk2262cfe2002-11-18 00:14:45 +00001304 c = ide_inb(device,ATA_SECT_CNT);
wdenk1a344f22005-02-03 23:00:49 +00001305 debug ("Powersaving %02X\n",c);
wdenkc6097192002-11-03 00:24:07 +00001306 if(c==0)
1307 pwrsave=1;
1308 }
1309
1310
1311 while (blkcnt-- > 0) {
1312
1313 c = ide_wait (device, IDE_TIME_OUT);
1314
1315 if (c & ATA_STAT_BUSY) {
1316 printf ("IDE read: device %d not ready\n", device);
1317 break;
1318 }
wdenk42dfe7a2004-03-14 22:25:36 +00001319#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001320 if (lba48) {
1321 /* write high bits */
1322 ide_outb (device, ATA_SECT_CNT, 0);
1323 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1324 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1325 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1326 }
1327#endif
wdenk2262cfe2002-11-18 00:14:45 +00001328 ide_outb (device, ATA_SECT_CNT, 1);
1329 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1330 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1331 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
wdenkc40b2952004-03-13 23:29:43 +00001332
wdenk42dfe7a2004-03-14 22:25:36 +00001333#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001334 if (lba48) {
1335 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1336 ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
1337
1338 } else
1339#endif
1340 {
1341 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1342 ATA_DEVICE(device) |
1343 ((blknr >> 24) & 0xF) );
1344 ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
1345 }
wdenkc6097192002-11-03 00:24:07 +00001346
1347 udelay (50);
1348
1349 if(pwrsave) {
1350 c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
1351 pwrsave=0;
1352 } else {
1353 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1354 }
1355
1356 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
wdenk42dfe7a2004-03-14 22:25:36 +00001357#if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
wdenkc40b2952004-03-13 23:29:43 +00001358 printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
wdenkc6097192002-11-03 00:24:07 +00001359 device, blknr, c);
wdenkc40b2952004-03-13 23:29:43 +00001360#else
1361 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1362 device, (ulong)blknr, c);
1363#endif
wdenkc6097192002-11-03 00:24:07 +00001364 break;
1365 }
1366
1367 input_data (device, buffer, ATA_SECTORWORDS);
wdenk2262cfe2002-11-18 00:14:45 +00001368 (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
wdenkc6097192002-11-03 00:24:07 +00001369
1370 ++n;
1371 ++blknr;
Greg Lopp0b945042007-04-13 08:02:24 +02001372 buffer += ATA_BLOCKSIZE;
wdenkc6097192002-11-03 00:24:07 +00001373 }
1374IDE_READ_E:
1375 ide_led (DEVICE_LED(device), 0); /* LED off */
1376 return (n);
1377}
1378
1379/* ------------------------------------------------------------------------- */
1380
1381
Grant Likelyeb867a72007-02-20 09:05:45 +01001382ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
wdenkc6097192002-11-03 00:24:07 +00001383{
1384 ulong n = 0;
1385 unsigned char c;
wdenk42dfe7a2004-03-14 22:25:36 +00001386#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001387 unsigned char lba48 = 0;
1388
1389 if (blknr & 0x0000fffff0000000) {
1390 /* more than 28 bits used, use 48bit mode */
1391 lba48 = 1;
1392 }
1393#endif
wdenkc6097192002-11-03 00:24:07 +00001394
1395 ide_led (DEVICE_LED(device), 1); /* LED on */
1396
1397 /* Select device
1398 */
wdenk2262cfe2002-11-18 00:14:45 +00001399 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001400
1401 while (blkcnt-- > 0) {
1402
1403 c = ide_wait (device, IDE_TIME_OUT);
1404
1405 if (c & ATA_STAT_BUSY) {
1406 printf ("IDE read: device %d not ready\n", device);
1407 goto WR_OUT;
1408 }
wdenk42dfe7a2004-03-14 22:25:36 +00001409#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001410 if (lba48) {
1411 /* write high bits */
1412 ide_outb (device, ATA_SECT_CNT, 0);
1413 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1414 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1415 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1416 }
1417#endif
wdenk2262cfe2002-11-18 00:14:45 +00001418 ide_outb (device, ATA_SECT_CNT, 1);
1419 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1420 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1421 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
wdenkc40b2952004-03-13 23:29:43 +00001422
wdenk42dfe7a2004-03-14 22:25:36 +00001423#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001424 if (lba48) {
1425 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1426 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1427
1428 } else
1429#endif
1430 {
1431 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1432 ATA_DEVICE(device) |
1433 ((blknr >> 24) & 0xF) );
1434 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
1435 }
wdenkc6097192002-11-03 00:24:07 +00001436
1437 udelay (50);
1438
1439 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1440
1441 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
wdenk42dfe7a2004-03-14 22:25:36 +00001442#if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
wdenkc40b2952004-03-13 23:29:43 +00001443 printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
wdenkc6097192002-11-03 00:24:07 +00001444 device, blknr, c);
wdenkc40b2952004-03-13 23:29:43 +00001445#else
1446 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1447 device, (ulong)blknr, c);
1448#endif
wdenkc6097192002-11-03 00:24:07 +00001449 goto WR_OUT;
1450 }
1451
1452 output_data (device, buffer, ATA_SECTORWORDS);
wdenk2262cfe2002-11-18 00:14:45 +00001453 c = ide_inb (device, ATA_STATUS); /* clear IRQ */
wdenkc6097192002-11-03 00:24:07 +00001454 ++n;
1455 ++blknr;
Greg Lopp0b945042007-04-13 08:02:24 +02001456 buffer += ATA_BLOCKSIZE;
wdenkc6097192002-11-03 00:24:07 +00001457 }
1458WR_OUT:
1459 ide_led (DEVICE_LED(device), 0); /* LED off */
1460 return (n);
1461}
1462
1463/* ------------------------------------------------------------------------- */
1464
1465/*
1466 * copy src to dest, skipping leading and trailing blanks and null
1467 * terminate the string
wdenk7d7ce412004-03-17 01:13:07 +00001468 * "len" is the size of available memory including the terminating '\0'
wdenkc6097192002-11-03 00:24:07 +00001469 */
wdenk7d7ce412004-03-17 01:13:07 +00001470static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
wdenkc6097192002-11-03 00:24:07 +00001471{
wdenk7d7ce412004-03-17 01:13:07 +00001472 unsigned char *end, *last;
wdenkc6097192002-11-03 00:24:07 +00001473
wdenk7d7ce412004-03-17 01:13:07 +00001474 last = dst;
wdenk6fb6af62004-03-23 23:20:24 +00001475 end = src + len - 1;
wdenk7d7ce412004-03-17 01:13:07 +00001476
1477 /* reserve space for '\0' */
1478 if (len < 2)
1479 goto OUT;
wdenkefa329c2004-03-23 20:18:25 +00001480
wdenk7d7ce412004-03-17 01:13:07 +00001481 /* skip leading white space */
1482 while ((*src) && (src<end) && (*src==' '))
1483 ++src;
1484
1485 /* copy string, omitting trailing white space */
1486 while ((*src) && (src<end)) {
1487 *dst++ = *src;
1488 if (*src++ != ' ')
1489 last = dst;
wdenkc6097192002-11-03 00:24:07 +00001490 }
wdenk7d7ce412004-03-17 01:13:07 +00001491OUT:
1492 *last = '\0';
wdenkc6097192002-11-03 00:24:07 +00001493}
1494
1495/* ------------------------------------------------------------------------- */
1496
1497/*
1498 * Wait until Busy bit is off, or timeout (in ms)
1499 * Return last status
1500 */
1501static uchar ide_wait (int dev, ulong t)
1502{
1503 ulong delay = 10 * t; /* poll every 100 us */
1504 uchar c;
1505
wdenk2262cfe2002-11-18 00:14:45 +00001506 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
wdenkc6097192002-11-03 00:24:07 +00001507 udelay (100);
1508 if (delay-- == 0) {
1509 break;
1510 }
1511 }
1512 return (c);
1513}
1514
1515/* ------------------------------------------------------------------------- */
1516
1517#ifdef CONFIG_IDE_RESET
1518extern void ide_set_reset(int idereset);
1519
1520static void ide_reset (void)
1521{
1522#if defined(CFG_PB_12V_ENABLE) || defined(CFG_PB_IDE_MOTOR)
1523 volatile immap_t *immr = (immap_t *)CFG_IMMR;
1524#endif
1525 int i;
1526
1527 curr_device = -1;
1528 for (i=0; i<CFG_IDE_MAXBUS; ++i)
1529 ide_bus_ok[i] = 0;
1530 for (i=0; i<CFG_IDE_MAXDEVICE; ++i)
1531 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
1532
1533 ide_set_reset (1); /* assert reset */
1534
1535 WATCHDOG_RESET();
1536
1537#ifdef CFG_PB_12V_ENABLE
1538 immr->im_cpm.cp_pbdat &= ~(CFG_PB_12V_ENABLE); /* 12V Enable output OFF */
1539 immr->im_cpm.cp_pbpar &= ~(CFG_PB_12V_ENABLE);
1540 immr->im_cpm.cp_pbodr &= ~(CFG_PB_12V_ENABLE);
1541 immr->im_cpm.cp_pbdir |= CFG_PB_12V_ENABLE;
1542
1543 /* wait 500 ms for the voltage to stabilize
1544 */
1545 for (i=0; i<500; ++i) {
1546 udelay (1000);
1547 }
1548
1549 immr->im_cpm.cp_pbdat |= CFG_PB_12V_ENABLE; /* 12V Enable output ON */
1550#endif /* CFG_PB_12V_ENABLE */
1551
1552#ifdef CFG_PB_IDE_MOTOR
1553 /* configure IDE Motor voltage monitor pin as input */
1554 immr->im_cpm.cp_pbpar &= ~(CFG_PB_IDE_MOTOR);
1555 immr->im_cpm.cp_pbodr &= ~(CFG_PB_IDE_MOTOR);
1556 immr->im_cpm.cp_pbdir &= ~(CFG_PB_IDE_MOTOR);
1557
1558 /* wait up to 1 s for the motor voltage to stabilize
1559 */
1560 for (i=0; i<1000; ++i) {
1561 if ((immr->im_cpm.cp_pbdat & CFG_PB_IDE_MOTOR) != 0) {
1562 break;
1563 }
1564 udelay (1000);
1565 }
1566
1567 if (i == 1000) { /* Timeout */
1568 printf ("\nWarning: 5V for IDE Motor missing\n");
1569# ifdef CONFIG_STATUS_LED
1570# ifdef STATUS_LED_YELLOW
1571 status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
1572# endif
1573# ifdef STATUS_LED_GREEN
1574 status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
1575# endif
1576# endif /* CONFIG_STATUS_LED */
1577 }
1578#endif /* CFG_PB_IDE_MOTOR */
1579
1580 WATCHDOG_RESET();
1581
1582 /* de-assert RESET signal */
1583 ide_set_reset(0);
1584
1585 /* wait 250 ms */
1586 for (i=0; i<250; ++i) {
1587 udelay (1000);
1588 }
1589}
1590
1591#endif /* CONFIG_IDE_RESET */
1592
1593/* ------------------------------------------------------------------------- */
1594
wdenke2ffd592004-12-31 09:32:47 +00001595#if defined(CONFIG_IDE_LED) && \
1596 !defined(CONFIG_AMIGAONEG3SE)&& \
1597 !defined(CONFIG_CPC45) && \
1598 !defined(CONFIG_HMI10) && \
1599 !defined(CONFIG_KUP4K) && \
1600 !defined(CONFIG_KUP4X)
wdenkc6097192002-11-03 00:24:07 +00001601
1602static uchar led_buffer = 0; /* Buffer for current LED status */
1603
1604static void ide_led (uchar led, uchar status)
1605{
1606 uchar *led_port = LED_PORT;
1607
1608 if (status) { /* switch LED on */
1609 led_buffer |= led;
1610 } else { /* switch LED off */
1611 led_buffer &= ~led;
1612 }
1613
1614 *led_port = led_buffer;
1615}
1616
1617#endif /* CONFIG_IDE_LED */
1618
1619/* ------------------------------------------------------------------------- */
1620
1621#ifdef CONFIG_ATAPI
1622/****************************************************************************
1623 * ATAPI Support
1624 */
1625
wdenkdb01a2e2004-04-15 23:14:49 +00001626#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
wdenkc6097192002-11-03 00:24:07 +00001627/* since ATAPI may use commands with not 4 bytes alligned length
1628 * we have our own transfer functions, 2 bytes alligned */
1629static void
1630output_data_shorts(int dev, ushort *sect_buf, int shorts)
1631{
wdenk1a344f22005-02-03 23:00:49 +00001632#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
wdenka522fa02004-01-04 22:51:12 +00001633 uchar *dbuf;
1634 volatile uchar *pbuf_even;
1635 volatile uchar *pbuf_odd;
1636
1637 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1638 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1639 while (shorts--) {
wdenk5cf91d62004-04-23 20:32:05 +00001640 EIEIO;
wdenka522fa02004-01-04 22:51:12 +00001641 *pbuf_even = *dbuf++;
wdenk5cf91d62004-04-23 20:32:05 +00001642 EIEIO;
wdenka522fa02004-01-04 22:51:12 +00001643 *pbuf_odd = *dbuf++;
1644 }
wdenk1a344f22005-02-03 23:00:49 +00001645#else
wdenkc6097192002-11-03 00:24:07 +00001646 ushort *dbuf;
1647 volatile ushort *pbuf;
1648
1649 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1650 dbuf = (ushort *)sect_buf;
wdenkdb01a2e2004-04-15 23:14:49 +00001651
wdenk1a344f22005-02-03 23:00:49 +00001652 debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
wdenkdb01a2e2004-04-15 23:14:49 +00001653
wdenkc6097192002-11-03 00:24:07 +00001654 while (shorts--) {
wdenk5cf91d62004-04-23 20:32:05 +00001655 EIEIO;
wdenk1a344f22005-02-03 23:00:49 +00001656 *pbuf = *dbuf++;
wdenkc6097192002-11-03 00:24:07 +00001657 }
wdenk1a344f22005-02-03 23:00:49 +00001658#endif
1659}
1660
1661static void
1662input_data_shorts(int dev, ushort *sect_buf, int shorts)
1663{
1664#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
wdenka522fa02004-01-04 22:51:12 +00001665 uchar *dbuf;
1666 volatile uchar *pbuf_even;
1667 volatile uchar *pbuf_odd;
1668
1669 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1670 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1671 while (shorts--) {
wdenk5cf91d62004-04-23 20:32:05 +00001672 EIEIO;
wdenka522fa02004-01-04 22:51:12 +00001673 *dbuf++ = *pbuf_even;
wdenk5cf91d62004-04-23 20:32:05 +00001674 EIEIO;
wdenka522fa02004-01-04 22:51:12 +00001675 *dbuf++ = *pbuf_odd;
1676 }
wdenk1a344f22005-02-03 23:00:49 +00001677#else
1678 ushort *dbuf;
1679 volatile ushort *pbuf;
1680
1681 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1682 dbuf = (ushort *)sect_buf;
1683
1684 debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
1685
1686 while (shorts--) {
1687 EIEIO;
1688 *dbuf++ = *pbuf;
1689 }
1690#endif
wdenkc6097192002-11-03 00:24:07 +00001691}
1692
wdenk2262cfe2002-11-18 00:14:45 +00001693#else /* ! __PPC__ */
1694static void
1695output_data_shorts(int dev, ushort *sect_buf, int shorts)
1696{
wdenk15647dc2003-10-09 19:00:25 +00001697 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
wdenk2262cfe2002-11-18 00:14:45 +00001698}
1699
wdenk2262cfe2002-11-18 00:14:45 +00001700static void
1701input_data_shorts(int dev, ushort *sect_buf, int shorts)
1702{
wdenk15647dc2003-10-09 19:00:25 +00001703 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
wdenk2262cfe2002-11-18 00:14:45 +00001704}
1705
1706#endif /* __PPC__ */
1707
wdenkc6097192002-11-03 00:24:07 +00001708/*
1709 * Wait until (Status & mask) == res, or timeout (in ms)
1710 * Return last status
1711 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1712 * and then they set their DRQ Bit
1713 */
1714static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
1715{
1716 ulong delay = 10 * t; /* poll every 100 us */
1717 uchar c;
1718
wdenk2262cfe2002-11-18 00:14:45 +00001719 c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
1720 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
wdenkc6097192002-11-03 00:24:07 +00001721 /* break if error occurs (doesn't make sense to wait more) */
1722 if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
1723 break;
1724 udelay (100);
1725 if (delay-- == 0) {
1726 break;
1727 }
1728 }
1729 return (c);
1730}
1731
1732/*
1733 * issue an atapi command
1734 */
1735unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
1736{
1737 unsigned char c,err,mask,res;
1738 int n;
1739 ide_led (DEVICE_LED(device), 1); /* LED on */
1740
1741 /* Select device
1742 */
1743 mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
1744 res = 0;
wdenkc7de8292002-11-19 11:04:11 +00001745#ifdef CONFIG_AMIGAONEG3SE
1746# warning THF: Removed LBA mode ???
1747#endif
wdenk2262cfe2002-11-18 00:14:45 +00001748 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001749 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1750 if ((c & mask) != res) {
1751 printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
1752 err=0xFF;
1753 goto AI_OUT;
1754 }
1755 /* write taskfile */
wdenk2262cfe2002-11-18 00:14:45 +00001756 ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
wdenkc7de8292002-11-19 11:04:11 +00001757 ide_outb (device, ATA_SECT_CNT, 0);
1758 ide_outb (device, ATA_SECT_NUM, 0);
wdenk2262cfe2002-11-18 00:14:45 +00001759 ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
wdenkc7de8292002-11-19 11:04:11 +00001760 ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
1761#ifdef CONFIG_AMIGAONEG3SE
1762# warning THF: Removed LBA mode ???
1763#endif
wdenk2262cfe2002-11-18 00:14:45 +00001764 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001765
wdenk2262cfe2002-11-18 00:14:45 +00001766 ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
wdenkc6097192002-11-03 00:24:07 +00001767 udelay (50);
1768
1769 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1770 res = ATA_STAT_DRQ;
1771 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1772
1773 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
1774 printf ("ATTAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
1775 err=0xFF;
1776 goto AI_OUT;
1777 }
1778
1779 output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
1780 /* ATAPI Command written wait for completition */
1781 udelay (5000); /* device must set bsy */
1782
1783 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1784 /* if no data wait for DRQ = 0 BSY = 0
1785 * if data wait for DRQ = 1 BSY = 0 */
1786 res=0;
1787 if(buflen)
1788 res = ATA_STAT_DRQ;
1789 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1790 if ((c & mask) != res ) {
1791 if (c & ATA_STAT_ERR) {
wdenk2262cfe2002-11-18 00:14:45 +00001792 err=(ide_inb(device,ATA_ERROR_REG))>>4;
wdenk1a344f22005-02-03 23:00:49 +00001793 debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
wdenkc6097192002-11-03 00:24:07 +00001794 } else {
1795 printf ("ATTAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
1796 err=0xFF;
1797 }
1798 goto AI_OUT;
1799 }
wdenk2262cfe2002-11-18 00:14:45 +00001800 n=ide_inb(device, ATA_CYL_HIGH);
wdenkc6097192002-11-03 00:24:07 +00001801 n<<=8;
wdenk2262cfe2002-11-18 00:14:45 +00001802 n+=ide_inb(device, ATA_CYL_LOW);
wdenkc6097192002-11-03 00:24:07 +00001803 if(n>buflen) {
1804 printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
1805 err=0xff;
1806 goto AI_OUT;
1807 }
1808 if((n==0)&&(buflen<0)) {
1809 printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
1810 err=0xff;
1811 goto AI_OUT;
1812 }
1813 if(n!=buflen) {
wdenk1a344f22005-02-03 23:00:49 +00001814 debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
wdenkc6097192002-11-03 00:24:07 +00001815 }
1816 if(n!=0) { /* data transfer */
wdenk1a344f22005-02-03 23:00:49 +00001817 debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
wdenkc6097192002-11-03 00:24:07 +00001818 /* we transfer shorts */
1819 n>>=1;
1820 /* ok now decide if it is an in or output */
wdenk2262cfe2002-11-18 00:14:45 +00001821 if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
wdenk1a344f22005-02-03 23:00:49 +00001822 debug ("Write to device\n");
wdenkc6097192002-11-03 00:24:07 +00001823 output_data_shorts(device,(unsigned short *)buffer,n);
1824 } else {
wdenk1a344f22005-02-03 23:00:49 +00001825 debug ("Read from device @ %p shorts %d\n",buffer,n);
wdenkc6097192002-11-03 00:24:07 +00001826 input_data_shorts(device,(unsigned short *)buffer,n);
1827 }
1828 }
1829 udelay(5000); /* seems that some CD ROMs need this... */
1830 mask = ATA_STAT_BUSY|ATA_STAT_ERR;
1831 res=0;
1832 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1833 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
wdenk2262cfe2002-11-18 00:14:45 +00001834 err=(ide_inb(device,ATA_ERROR_REG) >> 4);
wdenk1a344f22005-02-03 23:00:49 +00001835 debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
wdenkc6097192002-11-03 00:24:07 +00001836 } else {
1837 err = 0;
1838 }
1839AI_OUT:
1840 ide_led (DEVICE_LED(device), 0); /* LED off */
1841 return (err);
1842}
1843
1844/*
1845 * sending the command to atapi_issue. If an status other than good
1846 * returns, an request_sense will be issued
1847 */
1848
1849#define ATAPI_DRIVE_NOT_READY 100
1850#define ATAPI_UNIT_ATTN 10
1851
1852unsigned char atapi_issue_autoreq (int device,
1853 unsigned char* ccb,
1854 int ccblen,
1855 unsigned char *buffer,
1856 int buflen)
1857{
1858 unsigned char sense_data[18],sense_ccb[12];
1859 unsigned char res,key,asc,ascq;
1860 int notready,unitattn;
1861
wdenkc7de8292002-11-19 11:04:11 +00001862#ifdef CONFIG_AMIGAONEG3SE
1863 char *s;
1864 unsigned int timeout, retrycnt;
1865
1866 s = getenv("ide_cd_timeout");
1867 timeout = s ? (simple_strtol(s, NULL, 10)*1000000)/5 : 0;
1868
1869 retrycnt = 0;
1870#endif
1871
wdenkc6097192002-11-03 00:24:07 +00001872 unitattn=ATAPI_UNIT_ATTN;
1873 notready=ATAPI_DRIVE_NOT_READY;
1874
1875retry:
1876 res= atapi_issue(device,ccb,ccblen,buffer,buflen);
1877 if (res==0)
1878 return (0); /* Ok */
1879
1880 if (res==0xFF)
1881 return (0xFF); /* error */
1882
wdenk1a344f22005-02-03 23:00:49 +00001883 debug ("(auto_req)atapi_issue returned sense key %X\n",res);
wdenkc6097192002-11-03 00:24:07 +00001884
1885 memset(sense_ccb,0,sizeof(sense_ccb));
1886 memset(sense_data,0,sizeof(sense_data));
1887 sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
wdenkc7de8292002-11-19 11:04:11 +00001888 sense_ccb[4]=18; /* allocation Length */
wdenkc6097192002-11-03 00:24:07 +00001889
1890 res=atapi_issue(device,sense_ccb,12,sense_data,18);
1891 key=(sense_data[2]&0xF);
1892 asc=(sense_data[12]);
1893 ascq=(sense_data[13]);
1894
wdenk1a344f22005-02-03 23:00:49 +00001895 debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
1896 debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
wdenkc6097192002-11-03 00:24:07 +00001897 sense_data[0],
1898 key,
1899 asc,
1900 ascq);
1901
1902 if((key==0))
1903 return 0; /* ok device ready */
1904
1905 if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
1906 if(unitattn-->0) {
1907 udelay(200*1000);
1908 goto retry;
1909 }
1910 printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
1911 goto error;
1912 }
1913 if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
1914 if (notready-->0) {
1915 udelay(200*1000);
1916 goto retry;
1917 }
1918 printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
1919 goto error;
1920 }
1921 if(asc==0x3a) {
wdenk1a344f22005-02-03 23:00:49 +00001922 debug ("Media not present\n");
wdenkc6097192002-11-03 00:24:07 +00001923 goto error;
1924 }
wdenkc7de8292002-11-19 11:04:11 +00001925
1926#ifdef CONFIG_AMIGAONEG3SE
1927 if ((sense_data[2]&0xF)==0x0B) {
wdenk1a344f22005-02-03 23:00:49 +00001928 debug ("ABORTED COMMAND...retry\n");
wdenkc7de8292002-11-19 11:04:11 +00001929 if (retrycnt++ < 4)
1930 goto retry;
1931 return (0xFF);
1932 }
1933
1934 if ((sense_data[2]&0xf) == 0x02 &&
1935 sense_data[12] == 0x04 &&
1936 sense_data[13] == 0x01 ) {
wdenk1a344f22005-02-03 23:00:49 +00001937 debug ("Waiting for unit to become active\n");
wdenkc7de8292002-11-19 11:04:11 +00001938 udelay(timeout);
1939 if (retrycnt++ < 4)
1940 goto retry;
1941 return 0xFF;
1942 }
1943#endif /* CONFIG_AMIGAONEG3SE */
1944
wdenkc6097192002-11-03 00:24:07 +00001945 printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
1946error:
wdenk1a344f22005-02-03 23:00:49 +00001947 debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
wdenkc6097192002-11-03 00:24:07 +00001948 return (0xFF);
1949}
1950
1951
wdenkc6097192002-11-03 00:24:07 +00001952static void atapi_inquiry(block_dev_desc_t * dev_desc)
1953{
1954 unsigned char ccb[12]; /* Command descriptor block */
1955 unsigned char iobuf[64]; /* temp buf */
1956 unsigned char c;
1957 int device;
1958
1959 device=dev_desc->dev;
1960 dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
1961 dev_desc->block_read=atapi_read;
1962
1963 memset(ccb,0,sizeof(ccb));
1964 memset(iobuf,0,sizeof(iobuf));
1965
1966 ccb[0]=ATAPI_CMD_INQUIRY;
1967 ccb[4]=40; /* allocation Legnth */
1968 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
1969
wdenk1a344f22005-02-03 23:00:49 +00001970 debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
wdenkc6097192002-11-03 00:24:07 +00001971 if (c!=0)
1972 return;
1973
1974 /* copy device ident strings */
1975 ident_cpy(dev_desc->vendor,&iobuf[8],8);
1976 ident_cpy(dev_desc->product,&iobuf[16],16);
1977 ident_cpy(dev_desc->revision,&iobuf[32],5);
1978
1979 dev_desc->lun=0;
1980 dev_desc->lba=0;
1981 dev_desc->blksz=0;
1982 dev_desc->type=iobuf[0] & 0x1f;
1983
1984 if ((iobuf[1]&0x80)==0x80)
1985 dev_desc->removable = 1;
1986 else
1987 dev_desc->removable = 0;
1988
1989 memset(ccb,0,sizeof(ccb));
1990 memset(iobuf,0,sizeof(iobuf));
1991 ccb[0]=ATAPI_CMD_START_STOP;
1992 ccb[4]=0x03; /* start */
1993
1994 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1995
wdenk1a344f22005-02-03 23:00:49 +00001996 debug ("ATAPI_CMD_START_STOP returned %x\n",c);
wdenkc6097192002-11-03 00:24:07 +00001997 if (c!=0)
1998 return;
1999
2000 memset(ccb,0,sizeof(ccb));
2001 memset(iobuf,0,sizeof(iobuf));
2002 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
2003
wdenk1a344f22005-02-03 23:00:49 +00002004 debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
wdenkc6097192002-11-03 00:24:07 +00002005 if (c!=0)
2006 return;
2007
2008 memset(ccb,0,sizeof(ccb));
2009 memset(iobuf,0,sizeof(iobuf));
2010 ccb[0]=ATAPI_CMD_READ_CAP;
2011 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
wdenk1a344f22005-02-03 23:00:49 +00002012 debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
wdenkc6097192002-11-03 00:24:07 +00002013 if (c!=0)
2014 return;
2015
wdenk1a344f22005-02-03 23:00:49 +00002016 debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
wdenkc6097192002-11-03 00:24:07 +00002017 iobuf[0],iobuf[1],iobuf[2],iobuf[3],
2018 iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
2019
2020 dev_desc->lba =((unsigned long)iobuf[0]<<24) +
2021 ((unsigned long)iobuf[1]<<16) +
2022 ((unsigned long)iobuf[2]<< 8) +
2023 ((unsigned long)iobuf[3]);
2024 dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
2025 ((unsigned long)iobuf[5]<<16) +
2026 ((unsigned long)iobuf[6]<< 8) +
2027 ((unsigned long)iobuf[7]);
wdenk42dfe7a2004-03-14 22:25:36 +00002028#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00002029 dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
wdenk42dfe7a2004-03-14 22:25:36 +00002030#endif
wdenkc6097192002-11-03 00:24:07 +00002031 return;
2032}
2033
2034
2035/*
2036 * atapi_read:
2037 * we transfer only one block per command, since the multiple DRQ per
2038 * command is not yet implemented
2039 */
2040#define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
2041#define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
2042#define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
2043
Grant Likelyeb867a72007-02-20 09:05:45 +01002044ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
wdenkc6097192002-11-03 00:24:07 +00002045{
2046 ulong n = 0;
2047 unsigned char ccb[12]; /* Command descriptor block */
2048 ulong cnt;
2049
wdenk1a344f22005-02-03 23:00:49 +00002050 debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
wdenkc6097192002-11-03 00:24:07 +00002051 device, blknr, blkcnt, (ulong)buffer);
2052
2053 do {
2054 if (blkcnt>ATAPI_READ_MAX_BLOCK) {
2055 cnt=ATAPI_READ_MAX_BLOCK;
2056 } else {
2057 cnt=blkcnt;
2058 }
2059 ccb[0]=ATAPI_CMD_READ_12;
2060 ccb[1]=0; /* reserved */
2061 ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
2062 ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
2063 ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
2064 ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
2065 ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
2066 ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
2067 ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
2068 ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
2069 ccb[10]=0; /* reserved */
2070 ccb[11]=0; /* reserved */
2071
2072 if (atapi_issue_autoreq(device,ccb,12,
2073 (unsigned char *)buffer,
2074 cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
2075 return (n);
2076 }
2077 n+=cnt;
2078 blkcnt-=cnt;
2079 blknr+=cnt;
Greg Lopp0b945042007-04-13 08:02:24 +02002080 buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
wdenkc6097192002-11-03 00:24:07 +00002081 } while (blkcnt > 0);
2082 return (n);
2083}
2084
2085/* ------------------------------------------------------------------------- */
2086
2087#endif /* CONFIG_ATAPI */
2088
wdenk0d498392003-07-01 21:06:45 +00002089U_BOOT_CMD(
2090 ide, 5, 1, do_ide,
wdenk8bde7f72003-06-27 21:31:46 +00002091 "ide - IDE sub-system\n",
2092 "reset - reset IDE controller\n"
2093 "ide info - show available IDE devices\n"
2094 "ide device [dev] - show or set current device\n"
2095 "ide part [dev] - print partition table of one or all IDE devices\n"
2096 "ide read addr blk# cnt\n"
2097 "ide write addr blk# cnt - read/write `cnt'"
2098 " blocks starting at block `blk#'\n"
2099 " to/from memory address `addr'\n"
2100);
2101
wdenk0d498392003-07-01 21:06:45 +00002102U_BOOT_CMD(
2103 diskboot, 3, 1, do_diskboot,
wdenk8bde7f72003-06-27 21:31:46 +00002104 "diskboot- boot from IDE device\n",
2105 "loadAddr dev:part\n"
2106);
2107
Jon Loeligerc76fe472007-07-08 18:02:23 -05002108#endif