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Dirk Eibach60083262017-02-22 16:07:23 +01001/*
2 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
3 * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef _CONFIG_CONTROLCENTERDC_H
9#define _CONFIG_CONTROLCENTERDC_H
10
11/*
12 * High Level Configuration Options (easy to change)
13 */
14#define CONFIG_CUSTOMER_BOARD_SUPPORT
15
16#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
17#define CONFIG_DISPLAY_BOARDINFO_LATE
18#define CONFIG_BOARD_LATE_INIT
19#define CONFIG_LAST_STAGE_INIT
Dirk Eibach60083262017-02-22 16:07:23 +010020
21/*
22 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
23 * for DDR ECC byte filling in the SPL before loading the main
24 * U-Boot into it.
25 */
26#define CONFIG_SYS_TEXT_BASE 0x00800000
27
28#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
29
30#define CONFIG_LOADADDR 1000000
31
32/*
33 * Commands configuration
34 */
Dirk Eibach60083262017-02-22 16:07:23 +010035#define CONFIG_CMD_I2C
Dirk Eibach60083262017-02-22 16:07:23 +010036#define CONFIG_CMD_SPI
37
38/* SPI NOR flash default params, used by sf commands */
39#define CONFIG_SF_DEFAULT_BUS 1
40#define CONFIG_SF_DEFAULT_SPEED 1000000
41#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
42
43/*
44 * SDIO/MMC Card Configuration
45 */
46#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
47
48/*
49 * SATA/SCSI/AHCI configuration
50 */
51#define CONFIG_LIBATA
Dirk Eibach60083262017-02-22 16:07:23 +010052#define CONFIG_SCSI_AHCI
53#define CONFIG_SCSI_AHCI_PLAT
54#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
55#define CONFIG_SYS_SCSI_MAX_LUN 1
56#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
57 CONFIG_SYS_SCSI_MAX_LUN)
58
59/* Additional FS support/configuration */
60#define CONFIG_SUPPORT_VFAT
61
62/* USB/EHCI configuration */
63#define CONFIG_EHCI_IS_TDI
64
65/* Environment in SPI NOR flash */
Dirk Eibach60083262017-02-22 16:07:23 +010066#define CONFIG_ENV_SPI_BUS 1
67#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
68#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
69#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
70
71#define CONFIG_PHY_MARVELL /* there is a marvell phy */
72#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
73
74/* PCIe support */
75#ifndef CONFIG_SPL_BUILD
76#define CONFIG_PCI
77#define CONFIG_PCI_MVEBU
78#define CONFIG_PCI_PNP
79#define CONFIG_PCI_SCAN_SHOW
80#endif
81
82#define CONFIG_SYS_ALT_MEMTEST
83
84/*
85 * Software (bit-bang) MII driver configuration
86 */
87#define CONFIG_BITBANGMII /* bit-bang MII PHY management */
88#define CONFIG_BITBANGMII_MULTI
89
90/* SPL */
91/*
92 * Select the boot device here
93 *
94 * Currently supported are:
95 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
96 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
97 */
98#define SPL_BOOT_SPI_NOR_FLASH 1
99#define SPL_BOOT_SDIO_MMC_CARD 2
100#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
101
102/* Defines for SPL */
103#define CONFIG_SPL_FRAMEWORK
104#define CONFIG_SPL_SIZE (160 << 10)
105
106#if defined(CONFIG_SECURED_MODE_IMAGE)
107#define CONFIG_SPL_TEXT_BASE 0x40002614
108#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614)
109#else
110#define CONFIG_SPL_TEXT_BASE 0x40000030
111#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30)
112#endif
113
114#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
115#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
116
117#ifdef CONFIG_SPL_BUILD
118#define CONFIG_SYS_MALLOC_SIMPLE
119#endif
120
121#define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10))
122#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
123
124#define CONFIG_SPL_LIBCOMMON_SUPPORT
125#define CONFIG_SPL_LIBGENERIC_SUPPORT
126#define CONFIG_SPL_SERIAL_SUPPORT
127#define CONFIG_SPL_I2C_SUPPORT
128
129#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
130/* SPL related SPI defines */
131#define CONFIG_SPL_SPI_LOAD
132#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x30000
133#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
134#endif
135
136#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
137/* SPL related MMC defines */
138#define CONFIG_SPL_MMC_SUPPORT
139#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
140#define CONFIG_SYS_MMC_U_BOOT_OFFS (168 << 10)
141#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
142#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
143#ifdef CONFIG_SPL_BUILD
144#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
145#endif
146#endif
147
148/*
149 * Environment Configuration
150 */
151#define CONFIG_ENV_OVERWRITE
152
153#define CONFIG_BAUDRATE 115200
154
155#define CONFIG_HOSTNAME ccdc
156#define CONFIG_ROOTPATH "/opt/nfsroot"
157#define CONFIG_BOOTFILE "ccdc.img"
158
159#define CONFIG_PREBOOT /* enable preboot variable */
160
161#define CONFIG_EXTRA_ENV_SETTINGS \
162 "netdev=eth1\0" \
163 "consoledev=ttyS1\0" \
164 "u-boot=u-boot.bin\0" \
165 "bootfile_addr=1000000\0" \
166 "keyprogram_addr=3000000\0" \
167 "keyprogram_file=keyprogram.img\0" \
168 "fdtfile=controlcenterdc.dtb\0" \
169 "load=tftpboot ${loadaddr} ${u-boot}\0" \
170 "mmcdev=0:2\0" \
171 "update=sf probe 1:0;" \
172 " sf erase 0 +${filesize};" \
173 " sf write ${fileaddr} 0 ${filesize}\0" \
174 "upd=run load update\0" \
175 "fdt_high=0x10000000\0" \
176 "initrd_high=0x10000000\0" \
177 "loadkeyprogram=tpm flush_keys;" \
178 " mmc rescan;" \
179 " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
180 " source ${keyprogram_addr}:script@1\0" \
181 "gpio1=gpio@22_25\0" \
182 "gpio2=A29\0" \
183 "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \
184 "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \
185 "bootfail=for i in ${blinkseq}; do" \
186 " if test $i -eq 0; then" \
187 " gpio clear ${gpio1}; gpio set ${gpio2};" \
188 " elif test $i -eq 1; then" \
189 " gpio clear ${gpio1}; gpio clear ${gpio2};" \
190 " elif test $i -eq 2; then" \
191 " gpio set ${gpio1}; gpio set ${gpio2};" \
192 " else;" \
193 " gpio clear ${gpio1}; gpio set ${gpio2};" \
194 " fi; sleep 0.12; done\0"
195
196#define CONFIG_NFSBOOTCOMMAND \
197 "setenv bootargs root=/dev/nfs rw " \
198 "nfsroot=${serverip}:${rootpath} " \
199 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \
200 "console=${consoledev},${baudrate} ${othbootargs}; " \
201 "tftpboot ${bootfile_addr} ${bootfile}; " \
202 "bootm ${bootfile_addr}"
203
204#define CONFIG_MMCBOOTCOMMAND \
205 "setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \
206 "console=${consoledev},${baudrate} ${othbootargs}; " \
207 "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \
208 "bootm ${bootfile_addr}"
209
210#define CONFIG_BOOTCOMMAND \
211 "if env exists keyprogram; then;" \
212 " setenv keyprogram; run nfsboot;" \
213 " fi;" \
214 " run dobootfail"
215
216/*
217 * mv-common.h should be defined after CMD configs since it used them
218 * to enable certain macros
219 */
220#include "mv-common.h"
221
222#endif /* _CONFIG_CONTROLCENTERDC_H */