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Stelian Pop6afcabf2008-02-07 16:37:54 +00001/*
Stelian Pop983c1db2008-03-26 20:52:32 +01002 * (C) Copyright 2007-2008
Stelian Pop567fb852008-05-08 22:52:09 +02003 * Stelian Pop <stelian.pop@leadtechdesign.com>
Stelian Pop6afcabf2008-02-07 16:37:54 +00004 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91CAP9ADK board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/* ARM asynchronous clock */
Stelian Popad229a42008-11-07 13:55:14 +010031#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
Jean-Christophe PLAGNIOL-VILLARD6ebff362009-04-16 21:30:48 +020032#define CONFIG_SYS_HZ 1000
Stelian Pop6afcabf2008-02-07 16:37:54 +000033
Stelian Pop6afcabf2008-02-07 16:37:54 +000034#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
35#define CONFIG_AT91CAP9 1 /* It's an Atmel AT91CAP9 SoC */
36#define CONFIG_AT91CAP9ADK 1 /* on an AT91CAP9ADK Board */
Jean-Christophe PLAGNIOL-VILLARDdc39ae92009-04-16 21:30:44 +020037#define CONFIG_ARCH_CPU_INIT
Stelian Pop6afcabf2008-02-07 16:37:54 +000038#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
39
40#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
41#define CONFIG_SETUP_MEMORY_TAGS 1
42#define CONFIG_INITRD_TAG 1
43
44#define CONFIG_SKIP_LOWLEVEL_INIT
45#define CONFIG_SKIP_RELOCATE_UBOOT
46
Stelian Pop6afcabf2008-02-07 16:37:54 +000047/*
48 * Hardware drivers
49 */
Stelian Pop6afcabf2008-02-07 16:37:54 +000050#define CONFIG_ATMEL_USART 1
51#undef CONFIG_USART0
52#undef CONFIG_USART1
53#undef CONFIG_USART2
54#define CONFIG_USART3 1 /* USART 3 is DBGU */
55
Stelian Popc139b172008-05-08 14:52:29 +020056/* LCD */
57#define CONFIG_LCD 1
58#define LCD_BPP LCD_COLOR8
59#define CONFIG_LCD_LOGO 1
60#undef LCD_TEST_PATTERN
61#define CONFIG_LCD_INFO 1
62#define CONFIG_LCD_INFO_BELOW_LOGO 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020063#define CONFIG_SYS_WHITE_ON_BLACK 1
Stelian Popc139b172008-05-08 14:52:29 +020064#define CONFIG_ATMEL_LCD 1
65#define CONFIG_ATMEL_LCD_BGR555 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020066#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
Stelian Popc139b172008-05-08 14:52:29 +020067
Jean-Christophe PLAGNIOL-VILLARDa484b002009-03-21 21:08:00 +010068/* LED */
69#define CONFIG_AT91_LED
70#define CONFIG_RED_LED AT91_PIN_PC29 /* this is the power led */
71#define CONFIG_GREEN_LED AT91_PIN_PA10 /* this is the user1 led */
72#define CONFIG_YELLOW_LED AT91_PIN_PA11 /* this is the user1 led */
73
Stelian Pop6afcabf2008-02-07 16:37:54 +000074#define CONFIG_BOOTDELAY 3
Stelian Pop6afcabf2008-02-07 16:37:54 +000075
Stelian Pop6afcabf2008-02-07 16:37:54 +000076/*
77 * BOOTP options
78 */
79#define CONFIG_BOOTP_BOOTFILESIZE 1
80#define CONFIG_BOOTP_BOOTPATH 1
81#define CONFIG_BOOTP_GATEWAY 1
82#define CONFIG_BOOTP_HOSTNAME 1
83
84/*
85 * Command line configuration.
86 */
87#include <config_cmd_default.h>
88#undef CONFIG_CMD_BDI
Stelian Pop6afcabf2008-02-07 16:37:54 +000089#undef CONFIG_CMD_FPGA
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020090#undef CONFIG_CMD_IMI
Stelian Pop6afcabf2008-02-07 16:37:54 +000091#undef CONFIG_CMD_LOADS
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020092#undef CONFIG_CMD_SOURCE
Stelian Pop6afcabf2008-02-07 16:37:54 +000093
94#define CONFIG_CMD_PING 1
95#define CONFIG_CMD_DHCP 1
96#define CONFIG_CMD_NAND 1
97#define CONFIG_CMD_USB 1
98
99/* SDRAM: Careful: this supposes an AT91CAP-MEM33 expansion card */
100#define CONFIG_NR_DRAM_BANKS 1
101#define PHYS_SDRAM 0x70000000
102#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
103
104/* DataFlash */
Jean-Christophe PLAGNIOL-VILLARD4758ebd2009-03-27 23:26:44 +0100105#define CONFIG_ATMEL_DATAFLASH_SPI
Stelian Pop6afcabf2008-02-07 16:37:54 +0000106#define CONFIG_HAS_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200107#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
108#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
109#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
Stelian Pop93da48b2008-05-08 20:52:15 +0200110#define AT91_SPI_CLK 15000000
111#define DATAFLASH_TCSS (0x1a << 16)
112#define DATAFLASH_TCHS (0x1 << 24)
Stelian Pop6afcabf2008-02-07 16:37:54 +0000113
114/* NOR flash */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200115#define CONFIG_SYS_FLASH_CFI 1
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200116#define CONFIG_FLASH_CFI_DRIVER 1
Stelian Pop6afcabf2008-02-07 16:37:54 +0000117#define PHYS_FLASH_1 0x10000000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200118#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
119#define CONFIG_SYS_MAX_FLASH_SECT 256
120#define CONFIG_SYS_MAX_FLASH_BANKS 1
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100121/* our ALE is AD21 */
122#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
123/* our CLE is AD22 */
124#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
125#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15
Stelian Pop6afcabf2008-02-07 16:37:54 +0000126
Stelian Pop6afcabf2008-02-07 16:37:54 +0000127/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100128#ifdef CONFIG_CMD_NAND
129#define CONFIG_NAND_ATMEL
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200130#define CONFIG_SYS_MAX_NAND_DEVICE 1
131#define CONFIG_SYS_NAND_BASE 0x40000000
132#define CONFIG_SYS_NAND_DBW_8 1
Wolfgang Denk2eb99ca2009-07-18 21:52:24 +0200133
Wolfgang Denk7024aa12009-07-18 20:46:38 +0200134#endif
Stelian Pop6afcabf2008-02-07 16:37:54 +0000135
Stelian Pop6afcabf2008-02-07 16:37:54 +0000136/* Ethernet */
137#define CONFIG_MACB 1
138#define CONFIG_RMII 1
139#define CONFIG_NET_MULTI 1
140#define CONFIG_NET_RETRY_COUNT 20
141#define CONFIG_RESET_PHY_R 1
142
143/* USB */
Jean-Christophe PLAGNIOL-VILLARD2b7178a2009-03-27 23:26:44 +0100144#define CONFIG_USB_ATMEL
Stelian Pop6afcabf2008-02-07 16:37:54 +0000145#define CONFIG_USB_OHCI_NEW 1
Stelian Pop6afcabf2008-02-07 16:37:54 +0000146#define CONFIG_DOS_PARTITION 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200147#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
148#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */
149#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91cap9"
150#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Stelian Pop3e0cda02008-11-09 00:14:46 +0100151#define CONFIG_USB_STORAGE 1
152#define CONFIG_CMD_FAT 1
Stelian Pop6afcabf2008-02-07 16:37:54 +0000153
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200154#define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */
Stelian Pop6afcabf2008-02-07 16:37:54 +0000155
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
157#define CONFIG_SYS_MEMTEST_END 0x73e00000
Stelian Pop6afcabf2008-02-07 16:37:54 +0000158
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200159#define CONFIG_SYS_USE_DATAFLASH 1
160#undef CONFIG_SYS_USE_NORFLASH
Stelian Pop6afcabf2008-02-07 16:37:54 +0000161
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162#ifdef CONFIG_SYS_USE_DATAFLASH
Stelian Pop6afcabf2008-02-07 16:37:54 +0000163
164/* bootstrap + u-boot + env + linux in dataflash */
Jean-Christophe PLAGNIOL-VILLARD057c8492008-09-10 22:47:58 +0200165#define CONFIG_ENV_IS_IN_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200166#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200167#define CONFIG_ENV_OFFSET 0x4200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200168#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200169#define CONFIG_ENV_SIZE 0x4200
Stelian Popab526402008-05-08 20:52:17 +0200170#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x72000000 0x210000; bootm"
Stelian Pop32675082008-05-08 20:52:16 +0200171#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
172 "root=/dev/mtdblock1 " \
173 "mtdparts=physmap-flash.0:-(nor);" \
Albin Tonnerre918319c2009-07-22 18:30:03 +0200174 "atmel_nand:-(root) " \
Stelian Pop32675082008-05-08 20:52:16 +0200175 "rw rootfstype=jffs2"
Stelian Pop6afcabf2008-02-07 16:37:54 +0000176
177#else
178
179/* bootstrap + u-boot + env + linux in norflash */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200180#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181#define CONFIG_SYS_MONITOR_BASE (PHYS_FLASH_1 + 0x8000)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200182#define CONFIG_ENV_OFFSET 0x4000
183#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CONFIG_ENV_OFFSET)
184#define CONFIG_ENV_SIZE 0x4000
Stelian Pop6afcabf2008-02-07 16:37:54 +0000185#define CONFIG_BOOTCOMMAND "cp.b 0x10040000 0x72000000 0x200000; bootm"
Stelian Pop32675082008-05-08 20:52:16 +0200186#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
187 "root=/dev/mtdblock4 " \
188 "mtdparts=physmap-flash.0:16k(bootstrap)ro,"\
189 "16k(env),224k(uboot)ro,-(linux);" \
Albin Tonnerre918319c2009-07-22 18:30:03 +0200190 "atmel_nand:-(root) " \
Stelian Pop32675082008-05-08 20:52:16 +0200191 "rw rootfstype=jffs2"
Stelian Pop6afcabf2008-02-07 16:37:54 +0000192
193#endif
194
Stelian Pop983c1db2008-03-26 20:52:32 +0100195#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200196#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
Stelian Pop6afcabf2008-02-07 16:37:54 +0000197
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200198#define CONFIG_SYS_PROMPT "U-Boot> "
199#define CONFIG_SYS_CBSIZE 256
200#define CONFIG_SYS_MAXARGS 16
201#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
202#define CONFIG_SYS_LONGHELP 1
Stelian Pop6afcabf2008-02-07 16:37:54 +0000203#define CONFIG_CMDLINE_EDITING 1
204
Stelian Pop983c1db2008-03-26 20:52:32 +0100205/*
206 * Size of malloc() pool
207 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200208#define CONFIG_SYS_MALLOC_LEN ROUND(CONFIG_ENV_SIZE + 128*1024, 0x1000)
209#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
Stelian Pop983c1db2008-03-26 20:52:32 +0100210
Stelian Pop6afcabf2008-02-07 16:37:54 +0000211#define CONFIG_STACKSIZE (32*1024) /* regular stack */
212
213#ifdef CONFIG_USE_IRQ
214#error CONFIG_USE_IRQ not supported
215#endif
216
217#endif