blob: 0b04984c6ea79547ee941b2e4f15439c8c0ca1ad [file] [log] [blame]
Andy Shevchenko495f3772017-07-06 14:41:53 +03001/*
2 * Copyright (c) 2017 Intel Corporation
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/x86-gpio.h>
10#include <dt-bindings/interrupt-router/intel-irq.h>
11
12/include/ "skeleton.dtsi"
13/include/ "rtc.dtsi"
14/include/ "tsc_timer.dtsi"
15
16/ {
17 model = "Intel Edison";
18 compatible = "intel,edison";
19
20 aliases {
21 serial0 = &serial0;
22 };
23
24 chosen {
25 stdout-path = &serial0;
26 };
27
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 cpu@0 {
33 device_type = "cpu";
34 compatible = "cpu-x86";
35 reg = <0>;
36 intel,apic-id = <0>;
37 };
38
39 cpu@1 {
40 device_type = "cpu";
41 compatible = "cpu-x86";
42 reg = <1>;
43 intel,apic-id = <2>;
44 };
45 };
46
47 pci {
48 compatible = "pci-x86";
49 #address-cells = <3>;
50 #size-cells = <2>;
51 u-boot,dm-pre-reloc;
52 ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000
53 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
54 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
55 };
56
57 serial0: serial@ff010180 {
58 compatible = "intel,mid-uart";
59 reg = <0xff010180 0x100>;
60 reg-shift = <0>;
61 clock-frequency = <29491200>;
62 current-speed = <115200>;
63 };
64
65 emmc: mmc@ff3fc000 {
66 compatible = "intel,sdhci-tangier";
67 reg = <0xff3fc000 0x1000>;
68 };
69
70/*
71 * FIXME: For now U-Boot DM model doesn't allow to power up this controller.
72 * Enabling it will make U-Boot hang.
73 *
74 sdcard: mmc@ff3fa000 {
75 compatible = "intel,sdhci-tangier";
76 reg = <0xff3fa000 0x1000>;
77 };
78 */
79
80 pmu: power@ff00b000 {
81 compatible = "intel,pmu-mid";
82 reg = <0xff00b000 0x1000>;
83 };
84
85 scu: ipc@ff009000 {
86 compatible = "intel,scu-ipc";
87 reg = <0xff009000 0x1000>;
88 };
89};