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wdenkdc7c9a12003-03-26 06:55:25 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
wdenk85ec0bc2003-03-31 16:34:49 +000026#include <asm/arch/AT91RM9200.h>
Wolfgang Denk080bdb72005-10-05 01:51:29 +020027#include <at91rm9200_net.h>
28#include <dm9161.h>
wdenkdc7c9a12003-03-26 06:55:25 +000029
Wolfgang Denkd87080b2006-03-31 18:32:53 +020030DECLARE_GLOBAL_DATA_PTR;
31
wdenkdc7c9a12003-03-26 06:55:25 +000032/* ------------------------------------------------------------------------- */
33/*
34 * Miscelaneous platform dependent initialisations
35 */
36
wdenk2abbe072003-06-16 23:50:08 +000037int board_init (void)
38{
wdenk2abbe072003-06-16 23:50:08 +000039 /* Enable Ctrlc */
40 console_init_f ();
wdenkdc7c9a12003-03-26 06:55:25 +000041
wdenk2abbe072003-06-16 23:50:08 +000042 /* Correct IRDA resistor problem */
43 /* Set PA23_TXD in Output */
Wolfgang Denk27e166b2005-12-19 13:02:45 +010044 ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_OER = AT91C_PA23_TXD2;
wdenkdc7c9a12003-03-26 06:55:25 +000045
wdenk2abbe072003-06-16 23:50:08 +000046 /* memory and cpu-speed are setup before relocation */
47 /* so we do _nothing_ here */
48
49 /* arch number of AT91RM9200DK-Board */
Claudio Scordino8cc62a72008-09-12 02:20:46 +020050 gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200DK;
wdenk2abbe072003-06-16 23:50:08 +000051 /* adress of boot parameters */
52 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
53
54 return 0;
wdenkdc7c9a12003-03-26 06:55:25 +000055}
56
Jean-Christophe PLAGNIOL-VILLARDf82518d2009-03-27 23:26:43 +010057void board_reset (void)
58{
59 AT91PS_PIO pio = AT91C_BASE_PIOA;
60
61 /* Clear PA19 to trigger the hard reset */
62 writel(0x00080000, pio->PIO_CODR);
63 writel(0x00080000, pio->PIO_OER);
64 writel(0x00080000, pio->PIO_PER);
65}
66
wdenk2abbe072003-06-16 23:50:08 +000067int dram_init (void)
wdenkdc7c9a12003-03-26 06:55:25 +000068{
wdenk2abbe072003-06-16 23:50:08 +000069 gd->bd->bi_dram[0].start = PHYS_SDRAM;
70 gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
71 return 0;
wdenkdc7c9a12003-03-26 06:55:25 +000072}
73
Wolfgang Denk080bdb72005-10-05 01:51:29 +020074#ifdef CONFIG_DRIVER_ETHER
Jon Loeligerfcec2eb2007-07-09 18:19:09 -050075#if defined(CONFIG_CMD_NET)
Wolfgang Denk080bdb72005-10-05 01:51:29 +020076
77/*
78 * Name:
79 * at91rm9200_GetPhyInterface
80 * Description:
81 * Initialise the interface functions to the PHY
82 * Arguments:
83 * None
84 * Return value:
85 * None
86 */
87void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
88{
89 p_phyops->Init = dm9161_InitPhy;
90 p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
91 p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
92 p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
93}
94
Jon Loeligerfcec2eb2007-07-09 18:19:09 -050095#endif
Wolfgang Denk080bdb72005-10-05 01:51:29 +020096#endif /* CONFIG_DRIVER_ETHER */
97
wdenkdc7c9a12003-03-26 06:55:25 +000098/*
99 * Disk On Chip (NAND) Millenium initialization.
100 * The NAND lives in the CS2* space
101 */
Jon Loeligerfcec2eb2007-07-09 18:19:09 -0500102#if defined(CONFIG_CMD_NAND)
wdenka43278a2003-09-11 19:48:06 +0000103extern ulong nand_probe (ulong physadr);
wdenkdc7c9a12003-03-26 06:55:25 +0000104
wdenk2abbe072003-06-16 23:50:08 +0000105#define AT91_SMARTMEDIA_BASE 0x40000000 /* physical address to access memory on NCS3 */
106void nand_init (void)
wdenkdc7c9a12003-03-26 06:55:25 +0000107{
108 /* Setup Smart Media, fitst enable the address range of CS3 */
wdenk2abbe072003-06-16 23:50:08 +0000109 *AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
110 /* set the bus interface characteristics based on
111 tDS Data Set up Time 30 - ns
112 tDH Data Hold Time 20 - ns
113 tALS ALE Set up Time 20 - ns
114 16ns at 60 MHz ~= 3 */
wdenkdc7c9a12003-03-26 06:55:25 +0000115/*memory mapping structures */
116#define SM_ID_RWH (5 << 28)
117#define SM_RWH (1 << 28)
118#define SM_RWS (0 << 24)
119#define SM_TDF (1 << 8)
120#define SM_NWS (3)
wdenk2abbe072003-06-16 23:50:08 +0000121 AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
122 AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
123 SM_TDF | AT91C_SMC2_WSEN | SM_NWS);
wdenkdc7c9a12003-03-26 06:55:25 +0000124
wdenk2abbe072003-06-16 23:50:08 +0000125 /* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
126 *AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
127 AT91C_PC3_BFBAA_SMWE;
128 *AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
129 AT91C_PC3_BFBAA_SMWE;
wdenkdc7c9a12003-03-26 06:55:25 +0000130
131 /* Configure PC2 as input (signal READY of the SmartMedia) */
wdenk2abbe072003-06-16 23:50:08 +0000132 *AT91C_PIOC_PER = AT91C_PC2_BFAVD; /* enable direct output enable */
133 *AT91C_PIOC_ODR = AT91C_PC2_BFAVD; /* disable output */
wdenkdc7c9a12003-03-26 06:55:25 +0000134
135 /* Configure PB1 as input (signal Card Detect of the SmartMedia) */
wdenk2abbe072003-06-16 23:50:08 +0000136 *AT91C_PIOB_PER = AT91C_PIO_PB1; /* enable direct output enable */
137 *AT91C_PIOB_ODR = AT91C_PIO_PB1; /* disable output */
wdenkdc7c9a12003-03-26 06:55:25 +0000138
wdenk8b07a112004-07-10 21:45:47 +0000139 /* PIOB and PIOC clock enabling */
140 *AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
141 *AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
142
wdenk2abbe072003-06-16 23:50:08 +0000143 if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
wdenka43278a2003-09-11 19:48:06 +0000144 printf (" No SmartMedia card inserted\n");
145#ifdef DEBUG
146 printf (" SmartMedia card inserted\n");
wdenkdc7c9a12003-03-26 06:55:25 +0000147
wdenk2abbe072003-06-16 23:50:08 +0000148 printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
wdenka43278a2003-09-11 19:48:06 +0000149#endif
150 printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20);
wdenkdc7c9a12003-03-26 06:55:25 +0000151}
152#endif