blob: a3457f391449a9f943675a8c296ac6f3d9b0d0a3 [file] [log] [blame]
Jacob Chenf48f2b72016-09-19 18:46:27 +08001/*
2 * (C) Copyright 2015 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <clk.h>
9#include <dm.h>
10#include <ram.h>
11#include <asm/io.h>
12#include <asm/arch/clock.h>
13#include <asm/arch/periph.h>
Jacob Chen67171e12016-09-19 18:46:28 +080014#include <asm/arch/grf_rk3036.h>
15#include <asm/arch/boot_mode.h>
16#include <asm/arch/sdram_rk3036.h>
Jacob Chenf48f2b72016-09-19 18:46:27 +080017#include <asm/gpio.h>
18#include <dm/pinctrl.h>
19
20DECLARE_GLOBAL_DATA_PTR;
21
Jacob Chen67171e12016-09-19 18:46:28 +080022#define GRF_BASE 0x20008000
23
24static void setup_boot_mode(void)
25{
26 struct rk3036_grf *const grf = (void *)GRF_BASE;
27 int boot_mode = readl(&grf->os_reg[4]);
28
29 debug("boot mode %x.\n", boot_mode);
30
31 /* Clear boot mode */
32 writel(BOOT_NORMAL, &grf->os_reg[4]);
33
34 switch (boot_mode) {
35 case BOOT_FASTBOOT:
36 printf("enter fastboot!\n");
Simon Glass382bee52017-08-03 12:22:09 -060037 env_set("preboot", "setenv preboot; fastboot usb0");
Jacob Chen67171e12016-09-19 18:46:28 +080038 break;
39 case BOOT_UMS:
40 printf("enter UMS!\n");
Simon Glass382bee52017-08-03 12:22:09 -060041 env_set("preboot", "setenv preboot; ums mmc 0");
Jacob Chen67171e12016-09-19 18:46:28 +080042 break;
43 }
44}
45
46__weak int rk_board_late_init(void)
47{
48 return 0;
49}
50
51int board_late_init(void)
52{
53 setup_boot_mode();
54
55 return rk_board_late_init();
56}
57
Jacob Chenf48f2b72016-09-19 18:46:27 +080058int board_init(void)
59{
60 return 0;
61}
62
Kever Yang7805cdf2017-06-23 16:11:06 +080063#if !CONFIG_IS_ENABLED(RAM)
64/*
65 * When CONFIG_RAM is enabled, the dram_init() function is implemented
66 * in sdram_common.c.
67 */
Jacob Chenf48f2b72016-09-19 18:46:27 +080068int dram_init(void)
69{
70 gd->ram_size = sdram_size();
71
72 return 0;
73}
Kever Yang7805cdf2017-06-23 16:11:06 +080074#endif
Jacob Chenf48f2b72016-09-19 18:46:27 +080075
76#ifndef CONFIG_SYS_DCACHE_OFF
77void enable_caches(void)
78{
79 /* Enable D-cache. I-cache is already enabled in start.S */
80 dcache_enable();
81}
82#endif
83
84#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
85#include <usb.h>
86#include <usb/dwc2_udc.h>
87
88static struct dwc2_plat_otg_data rk3036_otg_data = {
89 .rx_fifo_sz = 512,
90 .np_tx_fifo_sz = 16,
91 .tx_fifo_sz = 128,
92};
93
94int board_usb_init(int index, enum usb_init_type init)
95{
96 int node;
97 const char *mode;
98 bool matched = false;
99 const void *blob = gd->fdt_blob;
100
101 /* find the usb_otg node */
102 node = fdt_node_offset_by_compatible(blob, -1,
103 "rockchip,rk3288-usb");
104
105 while (node > 0) {
106 mode = fdt_getprop(blob, node, "dr_mode", NULL);
107 if (mode && strcmp(mode, "otg") == 0) {
108 matched = true;
109 break;
110 }
111
112 node = fdt_node_offset_by_compatible(blob, node,
113 "rockchip,rk3288-usb");
114 }
115 if (!matched) {
116 debug("Not found usb_otg device\n");
117 return -ENODEV;
118 }
119 rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
120
121 return dwc2_udc_probe(&rk3036_otg_data);
122}
123
124int board_usb_cleanup(int index, enum usb_init_type init)
125{
126 return 0;
127}
128#endif