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Dave Liu8bd522c2008-01-11 18:48:24 +08001/*
2 * Copyright (C) 2007 Freescale Semiconductor, Inc.
3 *
4 * Author: Scott Wood <scottwood@freescale.com>
5 * Dave Liu <daveliu@freescale.com>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
Anton Vorontsovb8b71ff2009-06-10 00:25:36 +040027#include <hwconfig.h>
Dave Liu8bd522c2008-01-11 18:48:24 +080028#include <i2c.h>
Dave Liu8bd522c2008-01-11 18:48:24 +080029#include <libfdt.h>
Anton Vorontsov25f5f0d2008-07-08 21:00:04 +040030#include <fdt_support.h>
Dave Liu8bd522c2008-01-11 18:48:24 +080031#include <pci.h>
32#include <mpc83xx.h>
Ben Warren10efa022008-08-31 20:37:00 -070033#include <netdev.h>
Anton Vorontsov8f11e342009-01-08 04:26:17 +030034#include <asm/io.h>
Dave Liu8bd522c2008-01-11 18:48:24 +080035
36DECLARE_GLOBAL_DATA_PTR;
37
38int board_early_init_f(void)
39{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020040 volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
Dave Liu8bd522c2008-01-11 18:48:24 +080041
42 if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
43 gd->flags |= GD_FLG_SILENT;
44
45 return 0;
46}
47
48static u8 read_board_info(void)
49{
50 u8 val8;
51 i2c_set_bus_num(0);
52
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020053 if (i2c_read(CONFIG_SYS_I2C_PCF8574A_ADDR, 0, 0, &val8, 1) == 0)
Dave Liu8bd522c2008-01-11 18:48:24 +080054 return val8;
55 else
56 return 0;
57}
58
59int checkboard(void)
60{
61 static const char * const rev_str[] = {
62 "0.0",
63 "0.1",
64 "1.0",
65 "1.1",
66 "<unknown>",
67 };
68 u8 info;
69 int i;
70
71 info = read_board_info();
72 i = (!info) ? 4: info & 0x03;
73
74 printf("Board: Freescale MPC8315ERDB Rev %s\n", rev_str[i]);
75
76 return 0;
77}
78
79static struct pci_region pci_regions[] = {
80 {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020081 bus_start: CONFIG_SYS_PCI_MEM_BASE,
82 phys_start: CONFIG_SYS_PCI_MEM_PHYS,
83 size: CONFIG_SYS_PCI_MEM_SIZE,
Dave Liu8bd522c2008-01-11 18:48:24 +080084 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
85 },
86 {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020087 bus_start: CONFIG_SYS_PCI_MMIO_BASE,
88 phys_start: CONFIG_SYS_PCI_MMIO_PHYS,
89 size: CONFIG_SYS_PCI_MMIO_SIZE,
Dave Liu8bd522c2008-01-11 18:48:24 +080090 flags: PCI_REGION_MEM
91 },
92 {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020093 bus_start: CONFIG_SYS_PCI_IO_BASE,
94 phys_start: CONFIG_SYS_PCI_IO_PHYS,
95 size: CONFIG_SYS_PCI_IO_SIZE,
Dave Liu8bd522c2008-01-11 18:48:24 +080096 flags: PCI_REGION_IO
97 }
98};
99
Anton Vorontsov8f11e342009-01-08 04:26:17 +0300100static struct pci_region pcie_regions_0[] = {
101 {
102 .bus_start = CONFIG_SYS_PCIE1_MEM_BASE,
103 .phys_start = CONFIG_SYS_PCIE1_MEM_PHYS,
104 .size = CONFIG_SYS_PCIE1_MEM_SIZE,
105 .flags = PCI_REGION_MEM,
106 },
107 {
108 .bus_start = CONFIG_SYS_PCIE1_IO_BASE,
109 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
110 .size = CONFIG_SYS_PCIE1_IO_SIZE,
111 .flags = PCI_REGION_IO,
112 },
113};
114
115static struct pci_region pcie_regions_1[] = {
116 {
117 .bus_start = CONFIG_SYS_PCIE2_MEM_BASE,
118 .phys_start = CONFIG_SYS_PCIE2_MEM_PHYS,
119 .size = CONFIG_SYS_PCIE2_MEM_SIZE,
120 .flags = PCI_REGION_MEM,
121 },
122 {
123 .bus_start = CONFIG_SYS_PCIE2_IO_BASE,
124 .phys_start = CONFIG_SYS_PCIE2_IO_PHYS,
125 .size = CONFIG_SYS_PCIE2_IO_SIZE,
126 .flags = PCI_REGION_IO,
127 },
128};
129
Dave Liu8bd522c2008-01-11 18:48:24 +0800130void pci_init_board(void)
131{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200132 volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
Anton Vorontsov8f11e342009-01-08 04:26:17 +0300133 volatile sysconf83xx_t *sysconf = &immr->sysconf;
Dave Liu8bd522c2008-01-11 18:48:24 +0800134 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
135 volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
Anton Vorontsov8f11e342009-01-08 04:26:17 +0300136 volatile law83xx_t *pcie_law = sysconf->pcielaw;
Dave Liu8bd522c2008-01-11 18:48:24 +0800137 struct pci_region *reg[] = { pci_regions };
Anton Vorontsov8f11e342009-01-08 04:26:17 +0300138 struct pci_region *pcie_reg[] = { pcie_regions_0, pcie_regions_1, };
Dave Liu8bd522c2008-01-11 18:48:24 +0800139 int warmboot;
140
141 /* Enable all 3 PCI_CLK_OUTPUTs. */
142 clk->occr |= 0xe0000000;
143
144 /*
145 * Configure PCI Local Access Windows
146 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200147 pci_law[0].bar = CONFIG_SYS_PCI_MEM_PHYS & LAWBAR_BAR;
Dave Liu8bd522c2008-01-11 18:48:24 +0800148 pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB;
149
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200150 pci_law[1].bar = CONFIG_SYS_PCI_IO_PHYS & LAWBAR_BAR;
Dave Liu8bd522c2008-01-11 18:48:24 +0800151 pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
152
153 warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM;
154 warmboot |= immr->pmc.pmccr1 & PMCCR1_POWER_OFF;
155
156 mpc83xx_pci_init(1, reg, warmboot);
Anton Vorontsov8f11e342009-01-08 04:26:17 +0300157
158 /* Configure the clock for PCIE controller */
159 clrsetbits_be32(&clk->sccr, SCCR_PCIEXP1CM | SCCR_PCIEXP2CM,
160 SCCR_PCIEXP1CM_1 | SCCR_PCIEXP2CM_1);
161
162 /* Deassert the resets in the control register */
163 out_be32(&sysconf->pecr1, 0xE0008000);
164 out_be32(&sysconf->pecr2, 0xE0008000);
165 udelay(2000);
166
167 /* Configure PCI Express Local Access Windows */
168 out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR);
169 out_be32(&pcie_law[0].ar, LBLAWAR_EN | LBLAWAR_512MB);
170
171 out_be32(&pcie_law[1].bar, CONFIG_SYS_PCIE2_BASE & LAWBAR_BAR);
172 out_be32(&pcie_law[1].ar, LBLAWAR_EN | LBLAWAR_512MB);
173
174 mpc83xx_pcie_init(2, pcie_reg, warmboot);
Dave Liu8bd522c2008-01-11 18:48:24 +0800175}
176
177#if defined(CONFIG_OF_BOARD_SETUP)
Anton Vorontsov25f5f0d2008-07-08 21:00:04 +0400178void fdt_tsec1_fixup(void *fdt, bd_t *bd)
179{
Anton Vorontsov25f5f0d2008-07-08 21:00:04 +0400180 const char disabled[] = "disabled";
181 const char *path;
182 int ret;
183
Anton Vorontsovb8b71ff2009-06-10 00:25:36 +0400184 if (hwconfig_arg_cmp("board_type", "tsec1")) {
Anton Vorontsov021f6df2008-07-10 17:20:51 +0400185 return;
Anton Vorontsovb8b71ff2009-06-10 00:25:36 +0400186 } else if (!hwconfig_arg_cmp("board_type", "ulpi")) {
187 printf("NOTICE: No or unknown board_type hwconfig specified.\n"
188 " Assuming board with TSEC1.\n");
Anton Vorontsov021f6df2008-07-10 17:20:51 +0400189 return;
Anton Vorontsov25f5f0d2008-07-08 21:00:04 +0400190 }
191
192 ret = fdt_path_offset(fdt, "/aliases");
193 if (ret < 0) {
194 printf("WARNING: can't find /aliases node\n");
195 return;
196 }
197
198 path = fdt_getprop(fdt, ret, "ethernet0", NULL);
199 if (!path) {
200 printf("WARNING: can't find ethernet0 alias\n");
201 return;
202 }
203
204 do_fixup_by_path(fdt, path, "status", disabled, sizeof(disabled), 1);
205}
206
Dave Liu8bd522c2008-01-11 18:48:24 +0800207void ft_board_setup(void *blob, bd_t *bd)
208{
209 ft_cpu_setup(blob, bd);
210#ifdef CONFIG_PCI
211 ft_pci_setup(blob, bd);
212#endif
Anton Vorontsov25f5f0d2008-07-08 21:00:04 +0400213 fdt_fixup_dr_usb(blob, bd);
214 fdt_tsec1_fixup(blob, bd);
Dave Liu8bd522c2008-01-11 18:48:24 +0800215}
216#endif
Ben Warren10efa022008-08-31 20:37:00 -0700217
218int board_eth_init(bd_t *bis)
219{
220 cpu_eth_init(bis); /* Initialize TSECs first */
221 return pci_eth_init(bis);
222}