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Stefan Roeseb79316f2005-08-15 12:31:23 +02001/*
2* Copyright (C) 2005
3* Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com
4*
5* See file CREDITS for list of people who contributed to this
6* project.
7*
8* This program is free software; you can redistribute it and/or
9* modify it under the terms of the GNU General Public License as
10* published by the Free Software Foundation; either version 2 of
11* the License, or (at your option) any later version.
12*
13* This program is distributed in the hope that it will be useful,
14* but WITHOUT ANY WARRANTY; without even the implied warranty of
15* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16* GNU General Public License for more details.
17*
18* You should have received a copy of the GNU General Public License
19* along with this program; if not, write to the Free Software
20* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21* MA 02111-1307 USA
22*/
23
24#include <ppc_asm.tmpl>
25#include <config.h>
26
27/* General */
28#define TLB_VALID 0x00000200
29
30/* Supported page sizes */
31
32#define SZ_1K 0x00000000
33#define SZ_4K 0x00000010
34#define SZ_16K 0x00000020
35#define SZ_64K 0x00000030
36#define SZ_256K 0x00000040
37#define SZ_1M 0x00000050
38#define SZ_16M 0x00000070
39#define SZ_256M 0x00000090
40
41/* Storage attributes */
42#define SA_W 0x00000800 /* Write-through */
43#define SA_I 0x00000400 /* Caching inhibited */
44#define SA_M 0x00000200 /* Memory coherence */
45#define SA_G 0x00000100 /* Guarded */
46#define SA_E 0x00000080 /* Endian */
47
48/* Access control */
49#define AC_X 0x00000024 /* Execute */
50#define AC_W 0x00000012 /* Write */
51#define AC_R 0x00000009 /* Read */
52
53/* Some handy macros */
54
55#define EPN(e) ((e) & 0xfffffc00)
56#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
57#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
58#define TLB2(a) ( (a)&0x00000fbf )
59
60#define tlbtab_start\
61 mflr r1 ;\
62 bl 0f ;
63
64#define tlbtab_end\
65 .long 0, 0, 0 ; \
660: mflr r0 ; \
67 mtlr r1 ; \
68 blr ;
69
70#define tlbentry(epn,sz,rpn,erpn,attr)\
71 .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
72
73
74/**************************************************************************
75 * TLB TABLE
76 *
77 * This table is used by the cpu boot code to setup the initial tlb
78 * entries. Rather than make broad assumptions in the cpu source tree,
79 * this table lets each board set things up however they like.
80 *
81 * Pointer to the table is returned in r1
82 *
83 *************************************************************************/
84
85 .section .bootpg,"ax"
86 .globl tlbtab
87
88tlbtab:
89 tlbtab_start
90 tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
91 tlbentry( CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I)
92 tlbentry( CFG_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I)
93 tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
94 tlbentry( CFG_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
95 tlbentry( CFG_SDRAM_BASE+0x20000000, SZ_256M, 0x20000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
96 tlbentry( CFG_SDRAM_BASE+0x30000000, SZ_256M, 0x30000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
97 tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I )
98 tlbentry( CFG_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I )
99 tlbtab_end