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wdenk0db5bca2003-03-31 17:27:09 +00001/*
2 * (C) Copyright 2003
3 * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk0db5bca2003-03-31 17:27:09 +00006 */
7
8/*
9 * File: cpu.c
wdenk8bde7f72003-06-27 21:31:46 +000010 *
11 * Discription: Some cpu specific function for watchdog,
wdenk0db5bca2003-03-31 17:27:09 +000012 * cpu version test, clock setting ...
wdenk8bde7f72003-06-27 21:31:46 +000013 *
wdenk0db5bca2003-03-31 17:27:09 +000014 */
15
16
17#include <common.h>
18#include <watchdog.h>
19#include <command.h>
20#include <mpc5xx.h>
21
Wolfgang Denkd87080b2006-03-31 18:32:53 +020022DECLARE_GLOBAL_DATA_PTR;
wdenk0db5bca2003-03-31 17:27:09 +000023
24#if (defined(CONFIG_MPC555))
25# define ID_STR "MPC555/556"
26
27/*
28 * Check version of cpu with Processor Version Register (PVR)
29 */
30static int check_cpu_version (long clock, uint pvr, uint immr)
31{
32 char buf[32];
33 /* The highest 16 bits should be 0x0002 for a MPC555/556 */
34 if ((pvr >> 16) == 0x0002) {
35 printf (" " ID_STR " Version %x", (pvr >> 16));
36 printf (" at %s MHz:", strmhz (buf, clock));
37 } else {
38 printf ("Not supported cpu version");
39 return -1;
40 }
41 return 0;
42}
43#endif /* CONFIG_MPC555 */
44
45
46/*
47 * Check version of mpc5xx
48 */
49int checkcpu (void)
50{
wdenk0db5bca2003-03-31 17:27:09 +000051 ulong clock = gd->cpu_clk;
52 uint immr = get_immr (0); /* Return full IMMR contents */
53 uint pvr = get_pvr (); /* Retrieve PVR register */
54
55 puts ("CPU: ");
56
57 return check_cpu_version (clock, pvr, immr);
58}
59
60/*
wdenk8bde7f72003-06-27 21:31:46 +000061 * Called by macro WATCHDOG_RESET
wdenk0db5bca2003-03-31 17:27:09 +000062 */
63#if defined(CONFIG_WATCHDOG)
64void watchdog_reset (void)
65{
66 int re_enable = disable_interrupts ();
67
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020068 reset_5xx_watchdog ((immap_t *) CONFIG_SYS_IMMR);
wdenk0db5bca2003-03-31 17:27:09 +000069 if (re_enable)
70 enable_interrupts ();
71}
72
73/*
74 * Will clear software reset
75 */
76void reset_5xx_watchdog (volatile immap_t * immr)
77{
78 /* Use the MPC5xx Internal Watchdog */
79 immr->im_siu_conf.sc_swsr = 0x556c; /* Prevent SW time-out */
wdenk8bde7f72003-06-27 21:31:46 +000080 immr->im_siu_conf.sc_swsr = 0xaa39;
wdenk0db5bca2003-03-31 17:27:09 +000081}
82
83#endif /* CONFIG_WATCHDOG */
84
85
86/*
87 * Get timebase clock frequency
88 */
89unsigned long get_tbclk (void)
90{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020091 volatile immap_t *immr = (volatile immap_t *) CONFIG_SYS_IMMR;
wdenk0db5bca2003-03-31 17:27:09 +000092 ulong oscclk, factor;
93
94 if (immr->im_clkrst.car_sccr & SCCR_TBS) {
95 return (gd->cpu_clk / 16);
96 }
97
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020098 factor = (((CONFIG_SYS_PLPRCR) & PLPRCR_MF_MSK) >> PLPRCR_MF_SHIFT) + 1;
wdenk0db5bca2003-03-31 17:27:09 +000099
100 oscclk = gd->cpu_clk / factor;
101
102 if ((immr->im_clkrst.car_sccr & SCCR_RTSEL) == 0 || factor > 2) {
103 return (oscclk / 4);
104 }
105 return (oscclk / 16);
106}
107
wdenkb6e4c402004-01-02 16:05:07 +0000108void dcache_enable (void)
109{
110 return;
111}
112
113void dcache_disable (void)
114{
115 return;
116}
117
118int dcache_status (void)
119{
120 return 0; /* always off */
121}
wdenk0db5bca2003-03-31 17:27:09 +0000122
123/*
wdenk8bde7f72003-06-27 21:31:46 +0000124 * Reset board
wdenk0db5bca2003-03-31 17:27:09 +0000125 */
Wolfgang Denk54841ab2010-06-28 22:00:46 +0200126int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
wdenk0db5bca2003-03-31 17:27:09 +0000127{
wdenkb6e4c402004-01-02 16:05:07 +0000128#if defined(CONFIG_PATI)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200129 volatile ulong *addr = (ulong *) CONFIG_SYS_RESET_ADDRESS;
wdenkb6e4c402004-01-02 16:05:07 +0000130 *addr = 1;
131#else
wdenk0db5bca2003-03-31 17:27:09 +0000132 ulong addr;
wdenk8bde7f72003-06-27 21:31:46 +0000133
wdenk0db5bca2003-03-31 17:27:09 +0000134 /* Interrupts off, enable reset */
wdenk8bde7f72003-06-27 21:31:46 +0000135 __asm__ volatile (" mtspr 81, %r0 \n\t"
wdenkcceb8712003-06-23 18:12:28 +0000136 " mfmsr %r3 \n\t"
137 " rlwinm %r31,%r3,0,25,23\n\t"
138 " mtmsr %r31 \n\t");
wdenk8bde7f72003-06-27 21:31:46 +0000139 /*
140 * Trying to execute the next instruction at a non-existing address
141 * should cause a machine check, resulting in reset
142 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200143#ifdef CONFIG_SYS_RESET_ADDRESS
144 addr = CONFIG_SYS_RESET_ADDRESS;
wdenk0db5bca2003-03-31 17:27:09 +0000145#else
wdenk8bde7f72003-06-27 21:31:46 +0000146 /*
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200147 * note: when CONFIG_SYS_MONITOR_BASE points to a RAM address, CONFIG_SYS_MONITOR_BASE * - sizeof (ulong) is usually a valid address. Better pick an address
148 * known to be invalid on your system and assign it to CONFIG_SYS_RESET_ADDRESS.
wdenk8bde7f72003-06-27 21:31:46 +0000149 * "(ulong)-1" used to be a good choice for many systems...
150 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200151 addr = CONFIG_SYS_MONITOR_BASE - sizeof (ulong);
wdenk0db5bca2003-03-31 17:27:09 +0000152#endif
153 ((void (*) (void)) addr) ();
wdenkb6e4c402004-01-02 16:05:07 +0000154#endif /* #if defined(CONFIG_PATI) */
wdenk0db5bca2003-03-31 17:27:09 +0000155 return 1;
156}