| Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 1 | menu "PowerPC architecture" |
| 2 | depends on PPC | ||||
| 3 | |||||
| 4 | config SYS_ARCH | ||||
| Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 5 | default "powerpc" |
| 6 | |||||
| 7 | choice | ||||
| 8 | prompt "CPU select" | ||||
| Joe Hershberger | a26cd04 | 2015-05-12 14:46:23 -0500 | [diff] [blame] | 9 | optional |
| Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 10 | |
| Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 11 | config MPC83xx |
| 12 | bool "MPC83xx" | ||||
| Masahiro Yamada | a350c6a | 2015-07-15 20:59:29 +0900 | [diff] [blame] | 13 | select CREATE_ARCH_SYMLINK |
| York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 14 | select SYS_FSL_HAS_SEC |
| York Sun | 90b8038 | 2016-12-28 08:43:31 -0800 | [diff] [blame] | 15 | select SYS_FSL_SEC_BE |
| York Sun | 2c2e2c9 | 2016-12-28 08:43:30 -0800 | [diff] [blame] | 16 | select SYS_FSL_SEC_COMPAT_2 |
| Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 17 | |
| 18 | config MPC85xx | ||||
| 19 | bool "MPC85xx" | ||||
| Masahiro Yamada | a350c6a | 2015-07-15 20:59:29 +0900 | [diff] [blame] | 20 | select CREATE_ARCH_SYMLINK |
| York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 21 | select SYS_FSL_DDR |
| 22 | select SYS_FSL_DDR_BE | ||||
| Jagdish Gediya | 52fcb71 | 2018-09-03 21:35:09 +0530 | [diff] [blame] | 23 | select BINMAN |
| Simon Glass | 551c393 | 2017-05-17 03:25:25 -0600 | [diff] [blame] | 24 | imply CMD_HASH |
| Simon Glass | 1b33089 | 2017-05-17 03:25:39 -0600 | [diff] [blame] | 25 | imply CMD_IRQ |
| Michal Simek | 58008cb | 2018-07-23 15:55:15 +0200 | [diff] [blame] | 26 | imply USB_EHCI_HCD if USB |
| Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 27 | |
| 28 | config MPC86xx | ||||
| 29 | bool "MPC86xx" | ||||
| York Sun | d26e34c | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 30 | select SYS_FSL_DDR |
| 31 | select SYS_FSL_DDR_BE | ||||
| Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 32 | imply CMD_REGINFO |
| Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 33 | |
| Christophe Leroy | ee1e600 | 2018-03-16 17:20:41 +0100 | [diff] [blame] | 34 | config MPC8xx |
| Christophe Leroy | 907208c | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 35 | bool "MPC8xx" |
| Christophe Leroy | b3ede33 | 2018-03-16 17:20:51 +0100 | [diff] [blame] | 36 | select BOARD_EARLY_INIT_F |
| Christophe Leroy | fa37922 | 2017-08-04 16:34:40 -0600 | [diff] [blame] | 37 | imply CMD_REGINFO |
| Stefan Roese | f3729ba | 2019-04-11 15:58:46 +0200 | [diff] [blame] | 38 | imply WDT_MPC8xx |
| Christophe Leroy | 907208c | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 39 | |
| Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 40 | endchoice |
| 41 | |||||
| Mario Six | 93de253 | 2019-01-21 09:17:56 +0100 | [diff] [blame] | 42 | config HIGH_BATS |
| 43 | bool "Enable high BAT registers" | ||||
| 44 | help | ||||
| 45 | Enable BATs (block address translation registers) 4-7 on machines | ||||
| 46 | that support them. | ||||
| 47 | |||||
| Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 48 | source "arch/powerpc/cpu/mpc83xx/Kconfig" |
| 49 | source "arch/powerpc/cpu/mpc85xx/Kconfig" | ||||
| 50 | source "arch/powerpc/cpu/mpc86xx/Kconfig" | ||||
| Christophe Leroy | 907208c | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 51 | source "arch/powerpc/cpu/mpc8xx/Kconfig" |
| Masahiro Yamada | dd84058 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 52 | |
| 53 | endmenu | ||||