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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iommu/allwinner,sun50i-h6-iommu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner H6 IOMMU
8
9maintainers:
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
12
13properties:
14 "#iommu-cells":
15 const: 1
16 description:
17 The content of the cell is the master ID.
18
19 compatible:
Tom Rini6b642ac2024-10-01 12:20:28 -060020 oneOf:
21 - const: allwinner,sun50i-h6-iommu
22 - const: allwinner,sun50i-h616-iommu
23 - items:
24 - const: allwinner,sun55i-a523-iommu
25 - const: allwinner,sun50i-h616-iommu
Tom Rini53633a82024-02-29 12:33:36 -050026
27 reg:
28 maxItems: 1
29
30 interrupts:
31 maxItems: 1
32
33 clocks:
34 maxItems: 1
35
36 resets:
37 maxItems: 1
38
39required:
40 - "#iommu-cells"
41 - compatible
42 - reg
43 - interrupts
44 - clocks
45 - resets
46
47additionalProperties: false
48
49examples:
50 - |
51 #include <dt-bindings/interrupt-controller/arm-gic.h>
52 #include <dt-bindings/interrupt-controller/irq.h>
53
54 #include <dt-bindings/clock/sun50i-h6-ccu.h>
55 #include <dt-bindings/reset/sun50i-h6-ccu.h>
56
57 iommu: iommu@30f0000 {
58 compatible = "allwinner,sun50i-h6-iommu";
59 reg = <0x030f0000 0x10000>;
60 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
61 clocks = <&ccu CLK_BUS_IOMMU>;
62 resets = <&ccu RST_BUS_IOMMU>;
63 #iommu-cells = <1>;
64 };
65
66...