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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenkaffae2b2002-08-17 09:36:01 +00002/*
3 * Support for indirect PCI bridges.
4 *
5 * Copyright (C) 1998 Gabriel Paubert.
wdenkaffae2b2002-08-17 09:36:01 +00006 */
7
8#include <common.h>
9
Mario Sixe097ce42018-04-27 14:53:37 +020010#if !defined(__I386__) && !defined(CONFIG_DM_PCI)
wdenkaffae2b2002-08-17 09:36:01 +000011
12#include <asm/processor.h>
13#include <asm/io.h>
14#include <pci.h>
15
16#define cfg_read(val, addr, type, op) *val = op((type)(addr))
17#define cfg_write(val, addr, type, op) op((type *)(addr), (val))
18
Heiko Schocher2eb48ff2017-06-07 17:33:10 +020019#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
wdenk42d1f032003-10-15 23:53:47 +000020#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
21static int \
22indirect_##rw##_config_##size(struct pci_controller *hose, \
23 pci_dev_t dev, int offset, type val) \
24{ \
Kumar Galadffb70f2006-01-12 15:30:24 -060025 u32 b, d,f; \
26 b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
27 b = b - hose->first_busno; \
28 dev = PCI_BDF(b, d, f); \
Ed Swarthout571f49f2007-07-11 14:52:01 -050029 *(hose->cfg_addr) = dev | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000; \
wdenk42d1f032003-10-15 23:53:47 +000030 sync(); \
31 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
32 return 0; \
33}
wdenk4d75a502003-03-25 16:50:56 +000034#else
wdenkaffae2b2002-08-17 09:36:01 +000035#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
36static int \
Wolfgang Denk53677ef2008-05-20 16:00:29 +020037indirect_##rw##_config_##size(struct pci_controller *hose, \
wdenkaffae2b2002-08-17 09:36:01 +000038 pci_dev_t dev, int offset, type val) \
39{ \
Kumar Galadffb70f2006-01-12 15:30:24 -060040 u32 b, d,f; \
41 b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
42 b = b - hose->first_busno; \
43 dev = PCI_BDF(b, d, f); \
Wolfgang Denk53677ef2008-05-20 16:00:29 +020044 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
wdenkaffae2b2002-08-17 09:36:01 +000045 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
Wolfgang Denk53677ef2008-05-20 16:00:29 +020046 return 0; \
wdenkaffae2b2002-08-17 09:36:01 +000047}
wdenk4d75a502003-03-25 16:50:56 +000048#endif
wdenkaffae2b2002-08-17 09:36:01 +000049
wdenkaffae2b2002-08-17 09:36:01 +000050INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3)
51INDIRECT_PCI_OP(read, word, u16 *, in_le16, 2)
52INDIRECT_PCI_OP(read, dword, u32 *, in_le32, 0)
wdenkaffae2b2002-08-17 09:36:01 +000053INDIRECT_PCI_OP(write, byte, u8, out_8, 3)
54INDIRECT_PCI_OP(write, word, u16, out_le16, 2)
55INDIRECT_PCI_OP(write, dword, u32, out_le32, 0)
wdenkaffae2b2002-08-17 09:36:01 +000056
57void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
58{
59 pci_set_ops(hose,
60 indirect_read_config_byte,
61 indirect_read_config_word,
62 indirect_read_config_dword,
63 indirect_write_config_byte,
64 indirect_write_config_word,
65 indirect_write_config_dword);
66
67 hose->cfg_addr = (unsigned int *) cfg_addr;
68 hose->cfg_data = (unsigned char *) cfg_data;
69}
70
Michael Schwingen29161f42011-05-23 00:00:12 +020071#endif /* !__I386__ */