| Lokesh Vutla | eeb2e8b | 2019-06-13 10:29:53 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Device Tree Source for J721E SoC Family MCU/WAKEUP Domain peripherals |
| 4 | * |
| 5 | * Copyright (C) 2016-2019 Texas Instruments Incorporated - http://www.ti.com/ |
| 6 | */ |
| 7 | |
| 8 | &cbass_mcu_wakeup { |
| 9 | dmsc: dmsc@44083000 { |
| 10 | compatible = "ti,k2g-sci"; |
| 11 | ti,host-id = <12>; |
| 12 | |
| 13 | mbox-names = "rx", "tx"; |
| 14 | |
| 15 | mboxes= <&secure_proxy_main 11>, |
| 16 | <&secure_proxy_main 13>; |
| 17 | |
| 18 | reg-names = "debug_messages"; |
| 19 | reg = <0x00 0x44083000 0x0 0x1000>; |
| 20 | |
| 21 | k3_pds: power-controller { |
| 22 | compatible = "ti,sci-pm-domain"; |
| 23 | #power-domain-cells = <2>; |
| 24 | }; |
| 25 | |
| 26 | k3_clks: clocks { |
| 27 | compatible = "ti,k2g-sci-clk"; |
| 28 | #clock-cells = <2>; |
| 29 | ti,scan-clocks-from-dt; |
| 30 | }; |
| 31 | |
| 32 | k3_reset: reset-controller { |
| 33 | compatible = "ti,sci-reset"; |
| 34 | #reset-cells = <2>; |
| 35 | }; |
| 36 | }; |
| 37 | |
| 38 | wkup_pmx0: pinmux@4301c000 { |
| 39 | compatible = "pinctrl-single"; |
| 40 | /* Proxy 0 addressing */ |
| 41 | reg = <0x00 0x4301c000 0x00 0x178>; |
| 42 | #pinctrl-cells = <1>; |
| 43 | pinctrl-single,register-width = <32>; |
| 44 | pinctrl-single,function-mask = <0xffffffff>; |
| 45 | }; |
| 46 | |
| 47 | wkup_uart0: serial@42300000 { |
| 48 | compatible = "ti,j721e-uart", "ti,am654-uart"; |
| 49 | reg = <0x00 0x42300000 0x00 0x100>; |
| 50 | reg-shift = <2>; |
| 51 | reg-io-width = <4>; |
| 52 | interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>; |
| 53 | clock-frequency = <48000000>; |
| 54 | current-speed = <115200>; |
| 55 | power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>; |
| 56 | clocks = <&k3_clks 287 0>; |
| 57 | clock-names = "fclk"; |
| 58 | }; |
| 59 | |
| 60 | mcu_uart0: serial@40a00000 { |
| 61 | compatible = "ti,j721e-uart", "ti,am654-uart"; |
| 62 | reg = <0x00 0x40a00000 0x00 0x100>; |
| 63 | reg-shift = <2>; |
| 64 | reg-io-width = <4>; |
| 65 | interrupts = <GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH>; |
| 66 | clock-frequency = <96000000>; |
| 67 | current-speed = <115200>; |
| 68 | power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; |
| 69 | clocks = <&k3_clks 149 0>; |
| 70 | clock-names = "fclk"; |
| 71 | }; |
| Lokesh Vutla | b9f035e | 2019-09-04 16:01:37 +0530 | [diff] [blame^] | 72 | |
| 73 | mcu_r5fss0: r5fss@41000000 { |
| 74 | compatible = "ti,j721e-r5fss"; |
| 75 | lockstep-mode = <1>; |
| 76 | #address-cells = <1>; |
| 77 | #size-cells = <1>; |
| 78 | ranges = <0x41000000 0x00 0x41000000 0x20000>, |
| 79 | <0x41400000 0x00 0x41400000 0x20000>; |
| 80 | power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>; |
| 81 | |
| 82 | mcu_r5fss0_core0: r5f@41000000 { |
| 83 | compatible = "ti,j721e-r5f"; |
| 84 | reg = <0x41000000 0x00008000>, |
| 85 | <0x41010000 0x00008000>; |
| 86 | reg-names = "atcm", "btcm"; |
| 87 | ti,sci = <&dmsc>; |
| 88 | ti,sci-dev-id = <250>; |
| 89 | ti,sci-proc-ids = <0x01 0xFF>; |
| 90 | resets = <&k3_reset 250 1>; |
| 91 | atcm-enable = <1>; |
| 92 | btcm-enable = <1>; |
| 93 | loczrama = <1>; |
| 94 | }; |
| 95 | |
| 96 | mcu_r5fss0_core1: r5f@41400000 { |
| 97 | compatible = "ti,j721e-r5f"; |
| 98 | reg = <0x41400000 0x00008000>, |
| 99 | <0x41410000 0x00008000>; |
| 100 | reg-names = "atcm", "btcm"; |
| 101 | ti,sci = <&dmsc>; |
| 102 | ti,sci-dev-id = <251>; |
| 103 | ti,sci-proc-ids = <0x02 0xFF>; |
| 104 | resets = <&k3_reset 251 1>; |
| 105 | atcm-enable = <1>; |
| 106 | btcm-enable = <1>; |
| 107 | loczrama = <1>; |
| 108 | }; |
| 109 | }; |
| Lokesh Vutla | eeb2e8b | 2019-06-13 10:29:53 +0530 | [diff] [blame] | 110 | }; |