wdenk | 2d1a537 | 2004-02-23 19:30:57 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2004 |
| 3 | * IMMS, gGmbH <www.imms.de> |
| 4 | * Thomas Elste <info@elste.org> |
| 5 | * |
| 6 | * Configuation settings for ModNET50 board. |
| 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | */ |
| 26 | |
| 27 | #ifndef __CONFIG_H |
| 28 | #define __CONFIG_H |
| 29 | |
| 30 | /* |
wdenk | 2d1a537 | 2004-02-23 19:30:57 +0000 | [diff] [blame] | 31 | * High Level Configuration Options |
| 32 | * (easy to change) |
| 33 | */ |
| 34 | #define CONFIG_ARM7 1 /* This is a ARM7 CPU */ |
| 35 | #define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */ |
| 36 | #define CONFIG_NETARM /* it's a Netsiclicon NET+ARM */ |
| 37 | #undef CONFIG_NETARM_NET40_REV2 /* it's a Net+40 Rev. 2 */ |
| 38 | #undef CONFIG_NETARM_NET40_REV4 /* it's a Net+40 Rev. 4 */ |
| 39 | #define CONFIG_NETARM_NET50 /* it's a Net+50 */ |
| 40 | |
| 41 | #define CONFIG_MODNET50 1 /* on an ModNET50 Board */ |
| 42 | |
| 43 | #undef CONFIG_USE_IRQ /* don't need them anymore */ |
| 44 | |
| 45 | /* |
| 46 | * Size of malloc() pool |
| 47 | */ |
| 48 | #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) |
| 49 | #define CFG_GBL_DATA_SIZE 128 |
| 50 | |
| 51 | /* |
| 52 | * Hardware drivers |
| 53 | */ |
| 54 | #define CONFIG_DRIVER_NETARMETH 1 |
| 55 | |
| 56 | /* |
| 57 | * select serial console configuration |
| 58 | */ |
| 59 | #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ |
| 60 | |
| 61 | /* allow to overwrite serial and ethaddr */ |
| 62 | #define CONFIG_ENV_OVERWRITE |
| 63 | |
| 64 | #define CONFIG_BAUDRATE 38400 |
| 65 | |
| 66 | #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE) |
| 67 | |
| 68 | #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_JFFS2)) |
| 69 | |
| 70 | /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
| 71 | #include <cmd_confdefs.h> |
| 72 | |
| 73 | #define CONFIG_NETMASK 255.255.255.0 |
| 74 | #define CONFIG_IPADDR 192.168.30.2 |
| 75 | #define CONFIG_SERVERIP 192.168.30.122 |
| 76 | #define CFG_ETH_PHY_ADDR 0x100 |
| 77 | #define CONFIG_CMDLINE_TAG /* submit bootargs to kernel */ |
| 78 | |
| 79 | /*#define CONFIG_BOOTDELAY 10*/ |
| 80 | /* args and cmd for uClinux-image @ 0x10020000, ramdisk-image @ 0x100a0000 */ |
| 81 | #define CONFIG_BOOTCOMMAND "bootm 0x10020000 0x100a0000" |
| 82 | #define CONFIG_BOOTARGS "console=ttyS0,38400 initrd=0x100a0040,530K root=/dev/ram keepinitrd" |
| 83 | |
| 84 | #if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
| 85 | #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ |
| 86 | #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ |
| 87 | #endif |
| 88 | |
| 89 | /* |
| 90 | * Miscellaneous configurable options |
| 91 | */ |
| 92 | #define CFG_LONGHELP /* undef to save memory */ |
| 93 | #define CFG_PROMPT "modnet50 # " /* Monitor Command Prompt */ |
| 94 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
| 95 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
| 96 | #define CFG_MAXARGS 16 /* max number of command args */ |
| 97 | #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
| 98 | |
| 99 | #define CFG_MEMTEST_START 0x00400000 /* memtest works on */ |
| 100 | #define CFG_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */ |
| 101 | |
| 102 | #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ |
| 103 | |
| 104 | #define CFG_LOAD_ADDR 0x00500000 /* default load address */ |
| 105 | |
| 106 | #define CFG_HZ 900 /* decrementer freq: 2 kHz */ |
| 107 | |
| 108 | /* valid baudrates */ |
| 109 | #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
| 110 | |
| 111 | /*----------------------------------------------------------------------- |
| 112 | * Stack sizes |
| 113 | * |
| 114 | * The stack sizes are set up in start.S using the settings below |
| 115 | */ |
| 116 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
| 117 | #ifdef CONFIG_USE_IRQ |
| 118 | #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
| 119 | #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
| 120 | #endif |
| 121 | |
| 122 | /*----------------------------------------------------------------------- |
| 123 | * Physical Memory Map |
| 124 | */ |
| 125 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */ |
| 126 | #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ |
| 127 | #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */ |
| 128 | #define PHYS_SDRAM_2 0x01000000 /* SDRAM Bank #1 */ |
| 129 | #define PHYS_SDRAM_2_SIZE 0x01000000 /* 16 MB */ |
| 130 | |
| 131 | #define PHYS_FLASH_1 0x10000000 /* Flash Bank #1 */ |
| 132 | #define PHYS_FLASH_1_SIZE 0x00200000 /* 2 MB (one chip only, 16bit access) */ |
| 133 | |
| 134 | #define PHYS_FLASH_2 0x10200001 |
| 135 | #define PHYS_FLASH_2_SIZE 0x00200000 |
| 136 | |
| 137 | #define CONFIG_NETARM_EEPROM |
| 138 | /* #ifdef CONFIG_NETARM_EEPROM */ |
| 139 | #define PHYS_NVRAM_1 0x20000000 /* EEPROM Bank #1 */ |
| 140 | #define PHYS_NVRAM_SIZE 0x00002000 /* 8 KB */ |
| 141 | /* #endif */ |
| 142 | |
| 143 | #define PHYS_EXT_1 0x30000000 /* Extensions Bank #1 */ |
| 144 | #define PHYS_EXT_SIZE 0x01000000 /* 32 MB memory mapped I/O */ |
| 145 | |
| 146 | #define CFG_FLASH_BASE PHYS_FLASH_1 |
| 147 | #define CFG_FLASH_SIZE PHYS_FLASH_1_SIZE |
| 148 | |
| 149 | /*----------------------------------------------------------------------- |
| 150 | * FLASH and environment organization |
| 151 | */ |
| 152 | #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
| 153 | #define CFG_MAX_FLASH_SECT 35 /* max number of sectors on one chip */ |
| 154 | #define CFG_MAIN_SECT_SIZE 0x00010000 /* main size of sectors on one chip */ |
| 155 | |
| 156 | /* timeout values are in ticks */ |
| 157 | #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */ |
| 158 | #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */ |
| 159 | |
| 160 | /* environment settings */ |
| 161 | #define CFG_ENV_IS_IN_FLASH |
| 162 | #undef CFG_ENV_IS_NOWHERE |
| 163 | |
| 164 | #define CFG_ENV_ADDR 0x1001C000 /* environment start address */ |
| 165 | #define CFG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */ |
| 166 | #define CFG_ENV_SIZE 0x4000 /* max size for environment */ |
| 167 | |
Wolfgang Denk | 700a0c6 | 2005-08-08 01:03:24 +0200 | [diff] [blame] | 168 | /* |
| 169 | * JFFS2 partitions |
| 170 | * |
| 171 | */ |
| 172 | /* No command line, one static partition, whole device */ |
| 173 | #undef CONFIG_JFFS2_CMDLINE |
| 174 | #define CONFIG_JFFS2_DEV "nor0" |
| 175 | #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF |
| 176 | #define CONFIG_JFFS2_PART_OFFSET 0x00080000 |
| 177 | |
| 178 | /* mtdparts command line support */ |
| 179 | /* Note: fake mtd_id used, no linux mtd map file */ |
| 180 | /* |
| 181 | #define CONFIG_JFFS2_CMDLINE |
| 182 | #define MTDIDS_DEFAULT "nor0=modnet50-0" |
| 183 | #define MTDPARTS_DEFAULT "mtdparts=modnet50-0:-@512k(jffs2)" |
| 184 | */ |
wdenk | 2d1a537 | 2004-02-23 19:30:57 +0000 | [diff] [blame] | 185 | |
| 186 | #endif /* __CONFIG_H */ |