blob: 6940af9a5c17d992e5862e5d38ff48e6fe92b281 [file] [log] [blame]
Kever Yangbbd6e6d2017-11-28 16:04:15 +08001/*
2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7/dts-v1/;
8
9#include "rk3128.dtsi"
10
11/ {
12 model = "Rockchip RK3128 Evaluation board";
13 compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
14
15 chosen {
16 stdout-path = &uart2;
17 };
18
19 vcc5v0_otg: vcc5v0-otg-drv {
20 compatible = "regulator-fixed";
21 regulator-name = "vcc5v0_otg";
22 gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&otg_vbus_drv>;
25 regulator-min-microvolt = <5000000>;
26 regulator-max-microvolt = <5000000>;
27 };
28
29 vcc5v0_host: vcc5v0-host-drv {
30 compatible = "regulator-fixed";
31 regulator-name = "vcc5v0_host";
32 gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&host_vbus_drv>;
35 regulator-min-microvolt = <5000000>;
36 regulator-max-microvolt = <5000000>;
37 regulator-always-on;
38 };
39};
40
41&i2c1 {
42 status = "okay";
43
44 hym8563: hym8563@51 {
45 compatible = "haoyu,hym8563";
46 reg = <0x51>;
47 #clock-cells = <0>;
48 clock-frequency = <32768>;
49 clock-output-names = "xin32k";
50 };
51};
52
53&u2phy {
54 status = "okay";
55};
56
57&u2phy_otg {
58 status = "okay";
59};
60
61&u2phy_host {
62 status = "okay";
63};
64
65&usb_host_ehci {
66 status = "okay";
67};
68
69&usb_host_ohci {
70 status = "okay";
71};
72
73&usb_otg {
74 vbus-supply = <&vcc5v0_otg>;
75 status = "okay";
76};
77
78&emmc {
79 fifo-mode;
80 status = "okay";
81};
82
83&pinctrl {
84 usb_otg {
85 otg_vbus_drv: host-vbus-drv {
86 rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;
87 };
88 };
89
90 usb_host {
91 host_vbus_drv: host-vbus-drv {
92 rockchip,pins = <2 23 RK_FUNC_GPIO &pcfg_pull_none>;
93 };
94 };
95};