| Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Marek Vasut | d21f08b | 2017-10-09 21:08:10 +0200 | [diff] [blame] | 2 | /* |
| 3 | * include/configs/eagle.h |
| 4 | * This file is Eagle board configuration. |
| 5 | * |
| 6 | * Copyright (C) 2015 Renesas Electronics Corporation |
| Marek Vasut | d21f08b | 2017-10-09 21:08:10 +0200 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __EAGLE_H |
| 10 | #define __EAGLE_H |
| 11 | |
| Marek Vasut | d21f08b | 2017-10-09 21:08:10 +0200 | [diff] [blame] | 12 | #include "rcar-gen3-common.h" |
| 13 | |
| 14 | /* Ethernet RAVB */ |
| Marek Vasut | d21f08b | 2017-10-09 21:08:10 +0200 | [diff] [blame] | 15 | #define CONFIG_BITBANGMII |
| 16 | #define CONFIG_BITBANGMII_MULTI |
| 17 | |
| Marek Vasut | 5e7f63d | 2018-02-13 21:34:03 +0100 | [diff] [blame] | 18 | /* Environment compatibility */ |
| Marek Vasut | 5e7f63d | 2018-02-13 21:34:03 +0100 | [diff] [blame] | 19 | |
| Marek Vasut | d21f08b | 2017-10-09 21:08:10 +0200 | [diff] [blame] | 20 | /* Board Clock */ |
| 21 | /* XTAL_CLK : 33.33MHz */ |
| 22 | #define CONFIG_SYS_CLK_FREQ 33333333u |
| 23 | |
| 24 | /* Generic Timer Definitions (use in assembler source) */ |
| 25 | #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ |
| 26 | |
| 27 | #endif /* __EAGLE_H */ |