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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenk7133d4c2002-09-12 22:42:52 +00002/*
3 * (C) Copyright 2002
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Michael Zaidman800eb092010-09-20 08:51:53 +02006 * (C) Copyright 2010
7 * Michael Zaidman, Kodak, michael.zaidman@kodak.com
8 * post_word_{load|store} cleanup.
wdenk7133d4c2002-09-12 22:42:52 +00009 */
10#ifndef _POST_H
11#define _POST_H
12
13#ifndef __ASSEMBLY__
14#include <common.h>
Michael Zaidman800eb092010-09-20 08:51:53 +020015#include <asm/io.h>
16
Simon Glassc5404b62017-12-04 13:48:23 -070017#if defined(CONFIG_POST)
Michael Zaidman800eb092010-09-20 08:51:53 +020018
Tom Rini9cebc4a2022-11-19 18:45:44 -050019#ifndef CFG_POST_EXTERNAL_WORD_FUNCS
Tom Rini1e019502022-12-04 10:14:17 -050020#ifdef CFG_SYS_POST_WORD_ADDR
21#define _POST_WORD_ADDR CFG_SYS_POST_WORD_ADDR
Michael Zaidman800eb092010-09-20 08:51:53 +020022#else
23
Mario Six61abced2019-01-21 09:17:28 +010024#if defined(CONFIG_ARCH_MPC8360)
Zhao Qiang38d67a4e2014-06-03 16:27:07 +080025#include <linux/immap_qe.h>
Michael Zaidman800eb092010-09-20 08:51:53 +020026#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR)
27
28#elif defined (CONFIG_MPC85xx)
York Sun8790ac02010-09-28 15:20:35 -070029#include <asm/immap_85xx.h>
Tom Rini51552072022-10-28 20:27:12 -040030#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CFG_SYS_MPC85xx_PIC_OFFSET + \
Kumar Gala9de0aa72010-12-01 06:42:04 -060031 offsetof(ccsr_pic_t, tfrr))
wdenk7133d4c2002-09-12 22:42:52 +000032#endif
33
Michael Zaidman800eb092010-09-20 08:51:53 +020034#ifndef _POST_WORD_ADDR
35#error "_POST_WORD_ADDR currently not implemented for this platform!"
36#endif
Tom Rini1e019502022-12-04 10:14:17 -050037#endif /* CFG_SYS_POST_WORD_ADDR */
Michael Zaidman800eb092010-09-20 08:51:53 +020038
39static inline ulong post_word_load (void)
40{
41 return in_le32((volatile void *)(_POST_WORD_ADDR));
42}
43
44static inline void post_word_store (ulong value)
45{
46 out_le32((volatile void *)(_POST_WORD_ADDR), value);
47}
Valentin Longchamp3e161ce2011-09-02 04:59:04 +000048
49#else
50
51extern ulong post_word_load(void);
52extern void post_word_store(ulong value);
53
Tom Rini9cebc4a2022-11-19 18:45:44 -050054#endif /* CFG_POST_EXTERNAL_WORD_FUNCS */
Simon Glassc5404b62017-12-04 13:48:23 -070055#endif /* defined (CONFIG_POST) */
Michael Zaidman800eb092010-09-20 08:51:53 +020056#endif /* __ASSEMBLY__ */
57
wdenk7133d4c2002-09-12 22:42:52 +000058#ifdef CONFIG_POST
59
60#define POST_POWERON 0x01 /* test runs on power-on booting */
wdenk8564acf2003-07-14 22:13:32 +000061#define POST_NORMAL 0x02 /* test runs on normal booting */
62#define POST_SLOWTEST 0x04 /* test is slow, enabled by key press */
wdenk7133d4c2002-09-12 22:42:52 +000063#define POST_POWERTEST 0x08 /* test runs after watchdog reset */
64
wdenk27b207f2003-07-24 23:38:38 +000065#define POST_COLDBOOT 0x80 /* first boot after power-on */
66
wdenk7133d4c2002-09-12 22:42:52 +000067#define POST_ROM 0x0100 /* test runs in ROM */
68#define POST_RAM 0x0200 /* test runs in RAM */
69#define POST_MANUAL 0x0400 /* test runs on diag command */
70#define POST_REBOOT 0x0800 /* test may cause rebooting */
Michael Zaidman800eb092010-09-20 08:51:53 +020071#define POST_PREREL 0x1000 /* test runs before relocation */
wdenk7133d4c2002-09-12 22:42:52 +000072
Yuri Tikhonovb428f6a2008-02-04 14:11:03 +010073#define POST_CRITICAL 0x2000 /* Use failbootcmd if test failed */
Yuri Tikhonov28a38502008-05-08 15:45:26 +020074#define POST_STOP 0x4000 /* Interrupt POST sequence on fail */
Yuri Tikhonovb428f6a2008-02-04 14:11:03 +010075
wdenk7133d4c2002-09-12 22:42:52 +000076#define POST_MEM (POST_RAM | POST_ROM)
wdenk8564acf2003-07-14 22:13:32 +000077#define POST_ALWAYS (POST_NORMAL | \
78 POST_SLOWTEST | \
79 POST_MANUAL | \
wdenk7133d4c2002-09-12 22:42:52 +000080 POST_POWERON )
81
Yuri Tikhonovb428f6a2008-02-04 14:11:03 +010082#define POST_FAIL_SAVE 0x80
83
Michael Zaidmane070a562010-03-01 11:47:36 +020084#define POST_BEFORE 1
85#define POST_AFTER 0
86#define POST_PASSED 1
87#define POST_FAILED 0
88
wdenk7133d4c2002-09-12 22:42:52 +000089#ifndef __ASSEMBLY__
90
91struct post_test {
92 char *name;
93 char *cmd;
94 char *desc;
95 int flags;
96 int (*test) (int flags);
wdenk4532cb62003-04-27 22:52:51 +000097 int (*init_f) (void);
98 void (*reloc) (void);
wdenk228f29a2002-12-08 09:53:23 +000099 unsigned long testid;
wdenk7133d4c2002-09-12 22:42:52 +0000100};
wdenk4532cb62003-04-27 22:52:51 +0000101int post_init_f (void);
wdenk7133d4c2002-09-12 22:42:52 +0000102void post_bootmode_init (void);
103int post_bootmode_get (unsigned int * last_test);
104void post_bootmode_clear (void);
wdenk7133d4c2002-09-12 22:42:52 +0000105int post_run (char *name, int flags);
106int post_info (char *name);
107int post_log (char *format, ...);
wdenk4532cb62003-04-27 22:52:51 +0000108unsigned long post_time_ms (unsigned long base);
wdenk7133d4c2002-09-12 22:42:52 +0000109
Ovidiu Panait7addd3c2020-11-28 10:43:10 +0200110/**
111 * post_output_backlog() - Print POST results
112 *
113 * Print POST results during the generic board init sequence, after
114 * relocation.
115 *
116 * Return: 0 if OK
117 */
118int post_output_backlog(void);
119
wdenk7133d4c2002-09-12 22:42:52 +0000120extern struct post_test post_list[];
121extern unsigned int post_list_size;
wdenk27b207f2003-07-24 23:38:38 +0000122extern int post_hotkeys_pressed(void);
Heiko Schochereaf5e652011-07-26 20:31:08 +0000123extern int memory_post_test(int flags);
wdenk7133d4c2002-09-12 22:42:52 +0000124
Yuri Tikhonovce82ff02008-12-20 14:54:21 +0300125/*
126 * If GCC is configured to use a version of GAS that supports
127 * the .gnu_attribute directive, it will use that directive to
128 * record certain properties of the output code.
129 * This feature is new to GCC 4.3.0.
130 * .gnu_attribute is new to GAS 2.18.
131 */
132#if (__GNUC__ >= 4 && __GNUC_MINOR__ >= 3)
133/* Tag_GNU_Power_ABI_FP/soft-float */
134#define GNU_FPOST_ATTR asm(".gnu_attribute 4, 2");
135#else
136#define GNU_FPOST_ATTR
137#endif /* __GNUC__ */
wdenk7133d4c2002-09-12 22:42:52 +0000138#endif /* __ASSEMBLY__ */
139
Tom Rini1e019502022-12-04 10:14:17 -0500140#define CFG_SYS_POST_RTC 0x00000001
141#define CFG_SYS_POST_WATCHDOG 0x00000002
Tom Rini65cc0e22022-11-16 13:10:41 -0500142#define CFG_SYS_POST_MEMORY 0x00000004
Tom Rini1e019502022-12-04 10:14:17 -0500143#define CFG_SYS_POST_CPU 0x00000008
144#define CFG_SYS_POST_I2C 0x00000010
145#define CFG_SYS_POST_CACHE 0x00000020
146#define CFG_SYS_POST_UART 0x00000040
147#define CFG_SYS_POST_ETHER 0x00000080
148#define CFG_SYS_POST_USB 0x00000200
149#define CFG_SYS_POST_SPR 0x00000400
150#define CFG_SYS_POST_SYSMON 0x00000800
151#define CFG_SYS_POST_DSP 0x00001000
152#define CFG_SYS_POST_OCM 0x00002000
153#define CFG_SYS_POST_FPU 0x00004000
154#define CFG_SYS_POST_ECC 0x00008000
155#define CFG_SYS_POST_BSPEC1 0x00010000
156#define CFG_SYS_POST_BSPEC2 0x00020000
157#define CFG_SYS_POST_BSPEC3 0x00040000
158#define CFG_SYS_POST_BSPEC4 0x00080000
159#define CFG_SYS_POST_BSPEC5 0x00100000
160#define CFG_SYS_POST_CODEC 0x00200000
161#define CFG_SYS_POST_COPROC 0x00400000
162#define CFG_SYS_POST_FLASH 0x00800000
Tom Rini65cc0e22022-11-16 13:10:41 -0500163#define CFG_SYS_POST_MEM_REGIONS 0x01000000
wdenk7133d4c2002-09-12 22:42:52 +0000164
wdenk7133d4c2002-09-12 22:42:52 +0000165#endif /* CONFIG_POST */
166
167#endif /* _POST_H */