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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / bb3e5aa2896d69a6fe86861004d7d4e33824efbe / . / drivers / clk / sunxi / clk_a10.c
blob: 2aa41efe17fc94778cd3e22edf0cc286c4e1bcc1 [file] [log] [blame]
Jagan Teki6590bd82018-08-02 16:52:37 +0530[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2018 Amarula Solutions.
4 * Author: Jagan Teki <jagan@amarulasolutions.com>
5 */
6
7#include <common.h>
8#include <clk-uclass.h>
9#include <dm.h>
10#include <errno.h>
11#include <asm/arch/ccu.h>
12#include <dt-bindings/clock/sun4i-a10-ccu.h>
13#include <dt-bindings/reset/sun4i-a10-ccu.h>
14
15static struct ccu_clk_gate a10_gates[] = {
16 [CLK_AHB_OTG] = GATE(0x060, BIT(0)),
17 [CLK_AHB_EHCI0] = GATE(0x060, BIT(1)),
18 [CLK_AHB_OHCI0] = GATE(0x060, BIT(2)),
19 [CLK_AHB_EHCI1] = GATE(0x060, BIT(3)),
20 [CLK_AHB_OHCI1] = GATE(0x060, BIT(4)),
Andre Przywarabb3e5aa2019-01-29 15:54:09 +0000[diff] [blame^]21 [CLK_AHB_MMC0] = GATE(0x060, BIT(8)),
22 [CLK_AHB_MMC1] = GATE(0x060, BIT(9)),
23 [CLK_AHB_MMC2] = GATE(0x060, BIT(10)),
24 [CLK_AHB_MMC3] = GATE(0x060, BIT(11)),
Jagan Teki6590bd82018-08-02 16:52:37 +0530[diff] [blame]25
Jagan Teki4acc7112018-12-30 21:29:24 +0530[diff] [blame]26 [CLK_APB1_UART0] = GATE(0x06c, BIT(16)),
27 [CLK_APB1_UART1] = GATE(0x06c, BIT(17)),
28 [CLK_APB1_UART2] = GATE(0x06c, BIT(18)),
29 [CLK_APB1_UART3] = GATE(0x06c, BIT(19)),
30 [CLK_APB1_UART4] = GATE(0x06c, BIT(20)),
31 [CLK_APB1_UART5] = GATE(0x06c, BIT(21)),
32 [CLK_APB1_UART6] = GATE(0x06c, BIT(22)),
33 [CLK_APB1_UART7] = GATE(0x06c, BIT(23)),
34
Jagan Teki6590bd82018-08-02 16:52:37 +0530[diff] [blame]35 [CLK_USB_OHCI0] = GATE(0x0cc, BIT(6)),
36 [CLK_USB_OHCI1] = GATE(0x0cc, BIT(7)),
37 [CLK_USB_PHY] = GATE(0x0cc, BIT(8)),
38};
39
40static struct ccu_reset a10_resets[] = {
41 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
42 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
43 [RST_USB_PHY2] = RESET(0x0cc, BIT(2)),
44};
45
46static const struct ccu_desc a10_ccu_desc = {
47 .gates = a10_gates,
48 .resets = a10_resets,
49};
50
51static int a10_clk_bind(struct udevice *dev)
52{
53 return sunxi_reset_bind(dev, ARRAY_SIZE(a10_resets));
54}
55
56static const struct udevice_id a10_ccu_ids[] = {
57 { .compatible = "allwinner,sun4i-a10-ccu",
58 .data = (ulong)&a10_ccu_desc },
59 { .compatible = "allwinner,sun7i-a20-ccu",
60 .data = (ulong)&a10_ccu_desc },
61 { }
62};
63
64U_BOOT_DRIVER(clk_sun4i_a10) = {
65 .name = "sun4i_a10_ccu",
66 .id = UCLASS_CLK,
67 .of_match = a10_ccu_ids,
68 .priv_auto_alloc_size = sizeof(struct ccu_priv),
69 .ops = &sunxi_clk_ops,
70 .probe = sunxi_clk_probe,
71 .bind = a10_clk_bind,
72};