blob: 5b4747a575becce9239eed862e998857d58f2f86 [file] [log] [blame]
wdenk3d3befa2004-03-14 15:06:13 +00001/*
2 * (C) Copyright 2003
3 * Texas Instruments.
4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
6 *
7 * (C) Copyright 2004
8 * ARM Ltd.
9 * Philippe Robin, <philippe.robin@arm.com>
10 * Configuration for Compact Integrator board.
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#ifndef __CONFIG_H
32#define __CONFIG_H
33
34/*
35 * High Level Configuration Options
36 * (easy to change)
37 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020038#define CONFIG_SYS_MEMTEST_START 0x100000
39#define CONFIG_SYS_MEMTEST_END 0x10000000
40#define CONFIG_SYS_HZ 1000
41#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer 1 is clocked at 1Mhz */
42#define CONFIG_SYS_TIMERBASE 0x13000100
wdenk3d3befa2004-03-14 15:06:13 +000043
Wolfgang Denk74f43042005-09-25 01:48:28 +020044#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
wdenk3d3befa2004-03-14 15:06:13 +000045#define CONFIG_SETUP_MEMORY_TAGS 1
Wolfgang Denk74f43042005-09-25 01:48:28 +020046#define CONFIG_MISC_INIT_R 1 /* call misc_init_r during start up */
wdenk3d3befa2004-03-14 15:06:13 +000047/*
48 * Size of malloc() pool
49 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020050#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
51#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
wdenk3d3befa2004-03-14 15:06:13 +000052
53/*
54 * Hardware drivers
55 */
56#define CONFIG_DRIVER_SMC91111
57#define CONFIG_SMC_USE_32_BIT
58#define CONFIG_SMC91111_BASE 0xC8000000
59#undef CONFIG_SMC91111_EXT_PHY
60
61/*
62 * NS16550 Configuration
63 */
Andreas Engel48d01922008-09-08 14:30:53 +020064#define CONFIG_PL011_SERIAL
wdenk6705d812004-08-02 23:22:59 +000065#define CONFIG_PL011_CLOCK 14745600
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020066#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, (void *)CONFIG_SYS_SERIAL1 }
wdenk3d3befa2004-03-14 15:06:13 +000067#define CONFIG_CONS_INDEX 0
wdenk5a95f6f2005-01-12 00:38:03 +000068#define CONFIG_BAUDRATE 38400
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020069#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
70#define CONFIG_SYS_SERIAL0 0x16000000
71#define CONFIG_SYS_SERIAL1 0x17000000
wdenk3d3befa2004-03-14 15:06:13 +000072
Jon Loeliger1d2c6bc2007-07-04 22:32:32 -050073
wdenk5a95f6f2005-01-12 00:38:03 +000074/*
Jon Loeliger079a1362007-07-10 10:12:10 -050075 * BOOTP options
76 */
77#define CONFIG_BOOTP_BOOTFILESIZE
78#define CONFIG_BOOTP_BOOTPATH
79#define CONFIG_BOOTP_GATEWAY
80#define CONFIG_BOOTP_HOSTNAME
81
82
83/*
Jon Loeliger1d2c6bc2007-07-04 22:32:32 -050084 * Command line configuration.
85 */
86#define CONFIG_CMD_BDI
87#define CONFIG_CMD_DHCP
Mike Frysingerbdab39d2009-01-28 19:08:14 -050088#define CONFIG_CMD_SAVEENV
Jon Loeliger1d2c6bc2007-07-04 22:32:32 -050089#define CONFIG_CMD_FLASH
90#define CONFIG_CMD_IMI
91#define CONFIG_CMD_MEMORY
92#define CONFIG_CMD_NET
93#define CONFIG_CMD_PING
94
wdenk5a95f6f2005-01-12 00:38:03 +000095
wdenk5a95f6f2005-01-12 00:38:03 +000096#if 0
wdenk3d3befa2004-03-14 15:06:13 +000097#define CONFIG_BOOTDELAY 2
Wolfgang Denk9b880bd2005-10-04 23:10:28 +020098#define CONFIG_BOOTARGS "root=/dev/nfs nfsroot=<IP address>:/<exported rootfs> mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
wdenk3d3befa2004-03-14 15:06:13 +000099#define CONFIG_BOOTCOMMAND "bootp ; bootm"
wdenk5a95f6f2005-01-12 00:38:03 +0000100#endif
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200101/* The kernel command line & boot command below are for a platform flashed with afu.axf
wdenk3d3befa2004-03-14 15:06:13 +0000102
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200103Image 666 Block 0 End Block 0 address 0x24000000 exec 0x24000000- name u-boot
104Image 667 Block 1 End Block 13 address 0x24040000 exec 0x24040000- name u-linux
105Image 668 Block 14 End Block 33 address 0x24380000 exec 0x24380000- name rootfs
106SIB at Block62 End Block62 address 0x24f80000
107
Wolfgang Denk74f43042005-09-25 01:48:28 +0200108*/
109#define CONFIG_BOOTDELAY 2
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200110#define CONFIG_BOOTARGS "root=/dev/mtdblock2 mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0 console=ttyAMA0"
111#define CONFIG_BOOTCOMMAND "cp 0x24080000 0x7fc0 0x100000; bootm"
Wolfgang Denk74f43042005-09-25 01:48:28 +0200112
wdenk3d3befa2004-03-14 15:06:13 +0000113/*
114 * Miscellaneous configurable options
115 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200116#define CONFIG_SYS_LONGHELP /* undef to save memory */
117#define CONFIG_SYS_PROMPT "Integrator-CP # " /* Monitor Command Prompt */
118#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
wdenk3d3befa2004-03-14 15:06:13 +0000119/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200120#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
121#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
122#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/
wdenk3d3befa2004-03-14 15:06:13 +0000123
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200124#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
125#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
wdenk3d3befa2004-03-14 15:06:13 +0000126
127/*-----------------------------------------------------------------------
128 * Stack sizes
129 *
130 * The stack sizes are set up in start.S using the settings below
131 */
132#define CONFIG_STACKSIZE (128*1024) /* regular stack */
133#ifdef CONFIG_USE_IRQ
134#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
135#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
136#endif
137
138/*-----------------------------------------------------------------------
139 * Physical Memory Map
140 */
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200141#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
142#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200143#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
wdenk3d3befa2004-03-14 15:06:13 +0000144
145/*-----------------------------------------------------------------------
146 * FLASH and environment organization
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200147
148 * Top varies according to amount fitted
149 * Reserve top 4 blocks of flash
150 * - ARM Boot Monitor
151 * - Unused
152 * - SIB block
153 * - U-Boot environment
154 *
155 * Base is always 0x24000000
156
wdenk3d3befa2004-03-14 15:06:13 +0000157 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158#define CONFIG_SYS_FLASH_BASE 0x24000000
159#define CONFIG_SYS_MAX_FLASH_SECT 64
160#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200161#define PHYS_FLASH_SIZE 0x01000000 /* 16MB */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
163#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
wdenk3d3befa2004-03-14 15:06:13 +0000164
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#define CONFIG_SYS_MONITOR_LEN 0x00100000
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200166#define CONFIG_ENV_IS_IN_FLASH 1
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200167
168/*
169 * Move up the U-Boot & monitor area if more flash is fitted.
170 * If this U-Boot is to be run on Integrators with varying flash sizes,
Marcel Ziswiler7817cb22007-12-30 03:30:46 +0100171 * drivers/mtd/cfi_flash.c::flash_init() can read the Integrator CP_FLASHPROG
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200172 * register and dynamically assign CONFIG_ENV_ADDR & CONFIG_SYS_MONITOR_BASE
173 * - CONFIG_SYS_MONITOR_BASE is set to indicate that the environment is not
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200174 * embedded in the boot monitor(s) area
175 */
176#if ( PHYS_FLASH_SIZE == 0x04000000 )
177
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200178#define CONFIG_ENV_ADDR 0x27F00000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200179#define CONFIG_SYS_MONITOR_BASE 0x27F40000
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200180
181#elif (PHYS_FLASH_SIZE == 0x02000000 )
182
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200183#define CONFIG_ENV_ADDR 0x25F00000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200184#define CONFIG_SYS_MONITOR_BASE 0x25F40000
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200185
186#else
187
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200188#define CONFIG_ENV_ADDR 0x24F00000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200189#define CONFIG_SYS_MONITOR_BASE 0x27F40000
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200190
191#endif
192
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200193#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */
194#define CONFIG_ENV_SIZE 8192 /* 8KB */
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200195/*-----------------------------------------------------------------------
196 * CP control registers
197 */
198#define CPCR_BASE 0xCB000000 /* CP Registers*/
199#define OS_FLASHPROG 0x00000004 /* Flash register*/
200#define CPMASK_EXTRABANK 0x8
201#define CPMASK_FLASHSIZE 0x4
202#define CPMASK_FLWREN 0x2
203#define CPMASK_FLVPPEN 0x1
wdenk5a95f6f2005-01-12 00:38:03 +0000204
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200205/*
206 * The ARM boot monitor initializes the board.
207 * However, the default U-Boot code also performs the initialization.
208 * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
209 * - see documentation supplied with board for details of how to choose the
210 * image to run at reset/power up
211 * e.g. whether the ARM Boot Monitor runs before U-Boot
212
213#define CONFIG_SKIP_LOWLEVEL_INIT
214
215 */
216
217/*
218 * The ARM boot monitor does not relocate U-Boot.
219 * However, the default U-Boot code performs the relocation check,
220 * and may relocate the code if the memory map is changed.
221 * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
222
223#define SKIP_CONFIG_RELOCATE_UBOOT
224
225 */
Wolfgang Denk74f43042005-09-25 01:48:28 +0200226/*-----------------------------------------------------------------------
227 * There are various dependencies on the core module (CM) fitted
228 * Users should refer to their CM user guide
229 * - when porting adjust u-boot/Makefile accordingly
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200230 * to define the necessary CONFIG_ s for the CM involved
231 * see e.g. cp_926ejs_config
Wolfgang Denk74f43042005-09-25 01:48:28 +0200232 */
233
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200234#include "armcoremodule.h"
Wolfgang Denk74f43042005-09-25 01:48:28 +0200235
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200236/*
237 * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
238 * the core module has a CM_INIT register
239 * then the U-Boot initialisation code will
240 * e.g. ARM Boot Monitor or pre-loader is repeated once
241 * (to re-initialise any existing CM_INIT settings to safe values).
242 *
243 * This is usually not the desired behaviour since the platform
244 * will either reboot into the ARM monitor (or pre-loader)
245 * or continuously cycle thru it without U-Boot running,
246 * depending upon the setting of Integrator/CP switch S2-4.
247 *
248 * However it may be needed if Integrator/CP switch S2-1
249 * is set OFF to boot direct into U-Boot.
250 * In that case comment out the line below.
Wolfgang Denkfe7eb5d2005-09-25 02:00:47 +0200251#undef CONFIG_CM_INIT
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200252 */
Wolfgang Denk74f43042005-09-25 01:48:28 +0200253
wdenk5a95f6f2005-01-12 00:38:03 +0000254#endif /* __CONFIG_H */