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Wu, Josh9e336902013-04-16 23:42:44 +00001/*
2 * (C) Copyright 2013 Atmel Corporation.
3 * Josh Wu <josh.wu@atmel.com>
4 *
5 * Configuation settings for the AT91SAM9N12-EK boards.
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Wu, Josh9e336902013-04-16 23:42:44 +00008 */
9
10#ifndef __AT91SAM9N12_CONFIG_H_
11#define __AT91SAM9N12_CONFIG_H_
12
Wu, Josh9e336902013-04-16 23:42:44 +000013#define CONFIG_SYS_TEXT_BASE 0x26f00000
14
Wu, Josh9e336902013-04-16 23:42:44 +000015/* ARM asynchronous clock */
16#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
17#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
Wu, Josh9e336902013-04-16 23:42:44 +000018
19/* Misc CPU related */
20#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
21#define CONFIG_SETUP_MEMORY_TAGS
22#define CONFIG_INITRD_TAG
23#define CONFIG_SKIP_LOWLEVEL_INIT
Wu, Josh9e336902013-04-16 23:42:44 +000024
Wu, Josh9e336902013-04-16 23:42:44 +000025/* LCD */
Wu, Josh9e336902013-04-16 23:42:44 +000026#define LCD_BPP LCD_COLOR16
27#define LCD_OUTPUT_BPP 24
28#define CONFIG_LCD_LOGO
29#define CONFIG_LCD_INFO
30#define CONFIG_LCD_INFO_BELOW_LOGO
Wu, Josh9e336902013-04-16 23:42:44 +000031#define CONFIG_ATMEL_HLCD
32#define CONFIG_ATMEL_LCD_RGB565
Wu, Josh9e336902013-04-16 23:42:44 +000033
Wu, Josh9e336902013-04-16 23:42:44 +000034/*
35 * BOOTP options
36 */
37#define CONFIG_BOOTP_BOOTFILESIZE
38#define CONFIG_BOOTP_BOOTPATH
39#define CONFIG_BOOTP_GATEWAY
40#define CONFIG_BOOTP_HOSTNAME
41
Wu, Josh9e336902013-04-16 23:42:44 +000042#define CONFIG_NR_DRAM_BANKS 1
43#define CONFIG_SYS_SDRAM_BASE 0x20000000
44#define CONFIG_SYS_SDRAM_SIZE 0x08000000
45
46/*
47 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
48 * leaving the correct space for initial global data structure above
49 * that address while providing maximum stack area below.
50 */
51# define CONFIG_SYS_INIT_SP_ADDR \
Wenyou Yange61ed482017-09-14 11:07:42 +080052 (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Wu, Josh9e336902013-04-16 23:42:44 +000053
54/* DataFlash */
55#ifdef CONFIG_CMD_SF
Wu, Josh9e336902013-04-16 23:42:44 +000056#define CONFIG_SF_DEFAULT_SPEED 30000000
Wu, Josh9e336902013-04-16 23:42:44 +000057#endif
58
59/* NAND flash */
60#ifdef CONFIG_CMD_NAND
61#define CONFIG_NAND_ATMEL
62#define CONFIG_SYS_MAX_NAND_DEVICE 1
63#define CONFIG_SYS_NAND_BASE 0x40000000
64#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
65#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
Andreas Bießmannac45bb12013-11-29 12:13:45 +010066#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
67#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
Tom Rini8f1a80e2017-07-28 21:31:42 -040068#endif
Wu, Josh9e336902013-04-16 23:42:44 +000069
70/* PMECC & PMERRLOC */
71#define CONFIG_ATMEL_NAND_HWECC
72#define CONFIG_ATMEL_NAND_HW_PMECC
73#define CONFIG_PMECC_CAP 2
74#define CONFIG_PMECC_SECTOR_SIZE 512
Bo Shence76f0a2013-06-26 10:48:53 +080075
Wu, Josh9e336902013-04-16 23:42:44 +000076#define CONFIG_MTD_PARTITIONS
77#define CONFIG_MTD_DEVICE
Wu, Josh9e336902013-04-16 23:42:44 +000078
79#define CONFIG_EXTRA_ENV_SETTINGS \
80 "console=console=ttyS0,115200\0" \
Tom Rini43ede0b2017-10-22 17:55:07 -040081 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
Wu, Josh9e336902013-04-16 23:42:44 +000082 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
83 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
84
Bo Shen16276222013-04-24 10:46:18 +080085/* Ethernet */
86#define CONFIG_KS8851_MLL
87#define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */
88
Wu, Josh9e336902013-04-16 23:42:44 +000089#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
90
91#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
92#define CONFIG_SYS_MEMTEST_END 0x26e00000
93
Bo Shend9bef0a2013-10-21 16:13:59 +080094/* USB host */
95#ifdef CONFIG_CMD_USB
96#define CONFIG_USB_ATMEL
Bo Shendcd2f1a2013-10-21 16:14:00 +080097#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Bo Shend9bef0a2013-10-21 16:13:59 +080098#define CONFIG_USB_OHCI_NEW
99#define CONFIG_SYS_USB_OHCI_CPU_INIT
100#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
101#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
102#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Bo Shend9bef0a2013-10-21 16:13:59 +0800103#endif
104
Wenyou Yang55415432017-09-14 11:07:44 +0800105#ifdef CONFIG_SPI_BOOT
Wu, Josh9e336902013-04-16 23:42:44 +0000106
107/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Wu, Josh9e336902013-04-16 23:42:44 +0000108#define CONFIG_ENV_OFFSET 0x5000
109#define CONFIG_ENV_SIZE 0x3000
110#define CONFIG_ENV_SECT_SIZE 0x1000
111#define CONFIG_BOOTCOMMAND \
112 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
113 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
114 "bootm 0x22000000"
115
Wenyou Yang55415432017-09-14 11:07:44 +0800116#elif defined(CONFIG_NAND_BOOT)
Wu, Josh9e336902013-04-16 23:42:44 +0000117
118/* bootstrap + u-boot + env + linux in nandflash */
Wenyou Yang0ab54332017-04-18 14:54:51 +0800119#define CONFIG_ENV_OFFSET 0x120000
Wu, Josh9e336902013-04-16 23:42:44 +0000120#define CONFIG_ENV_OFFSET_REDUND 0x100000
121#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
122#define CONFIG_BOOTCOMMAND \
123 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
124 "nand read 0x21000000 0x180000 0x080000;" \
125 "nand read 0x22000000 0x200000 0x400000;" \
126 "bootm 0x22000000 - 0x21000000"
127
Wenyou Yang55415432017-09-14 11:07:44 +0800128#else /* CONFIG_SD_BOOT */
Wu, Josh9e336902013-04-16 23:42:44 +0000129
130/* bootstrap + u-boot + env + linux in mmc */
Wu, Josh23ac62d2015-03-24 17:07:22 +0800131
132#ifdef CONFIG_ENV_IS_IN_MMC
133/* Use raw reserved sectors to save environment */
Wu, Josh9e336902013-04-16 23:42:44 +0000134#define CONFIG_ENV_OFFSET 0x2000
135#define CONFIG_ENV_SIZE 0x1000
136#define CONFIG_SYS_MMC_ENV_DEV 0
Wu, Josh23ac62d2015-03-24 17:07:22 +0800137#else
138/* Use file in FAT file to save environment */
Wu, Josh23ac62d2015-03-24 17:07:22 +0800139#define CONFIG_ENV_SIZE 0x4000
140#endif
141
Wu, Josh9e336902013-04-16 23:42:44 +0000142#define CONFIG_BOOTCOMMAND \
143 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
144 "fatload mmc 0:1 0x21000000 dtb;" \
145 "fatload mmc 0:1 0x22000000 uImage;" \
146 "bootm 0x22000000 - 0x21000000"
147
148#endif
149
Wu, Josh9e336902013-04-16 23:42:44 +0000150#define CONFIG_SYS_LONGHELP
151#define CONFIG_CMDLINE_EDITING
152#define CONFIG_AUTO_COMPLETE
Wu, Josh9e336902013-04-16 23:42:44 +0000153
154/*
155 * Size of malloc() pool
156 */
157#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
Bo Shenff255e82015-03-27 14:23:36 +0800158
159/* SPL */
160#define CONFIG_SPL_FRAMEWORK
161#define CONFIG_SPL_TEXT_BASE 0x300000
162#define CONFIG_SPL_MAX_SIZE 0x6000
163#define CONFIG_SPL_STACK 0x308000
164
165#define CONFIG_SPL_BSS_START_ADDR 0x20000000
166#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
167#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
168#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
169
Bo Shenff255e82015-03-27 14:23:36 +0800170#define CONFIG_SYS_MONITOR_LEN (512 << 10)
171
172#define CONFIG_SYS_MASTER_CLOCK 132096000
173#define CONFIG_SYS_AT91_PLLA 0x20953f03
174#define CONFIG_SYS_MCKR 0x1301
175#define CONFIG_SYS_MCKR_CSS 0x1302
176
Wenyou Yang55415432017-09-14 11:07:44 +0800177#ifdef CONFIG_SD_BOOT
Bo Shenff255e82015-03-27 14:23:36 +0800178#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
179#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Bo Shenff255e82015-03-27 14:23:36 +0800180
181#elif CONFIG_SYS_USE_NANDFLASH
Wenyou Yang55415432017-09-14 11:07:44 +0800182#elif CONFIG_SPI_BOOT
183#define CONFIG_SPL_SPI_LOAD
184#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
185
186#elif CONFIG_NAND_BOOT
Bo Shenff255e82015-03-27 14:23:36 +0800187#define CONFIG_SPL_NAND_DRIVERS
188#define CONFIG_SPL_NAND_BASE
Wenyou Yang55415432017-09-14 11:07:44 +0800189#endif
Bo Shenff255e82015-03-27 14:23:36 +0800190#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
191#define CONFIG_SYS_NAND_5_ADDR_CYCLE
192#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
193#define CONFIG_SYS_NAND_PAGE_COUNT 64
194#define CONFIG_SYS_NAND_OOBSIZE 64
195#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
196#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
197#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
198
Wu, Josh9e336902013-04-16 23:42:44 +0000199#endif