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Igor Grinbergb09bf722014-11-05 14:25:35 +02001/*
2 * (C) Copyright 2013 CompuLab, Ltd.
3 * Author: Igor Grinberg <grinberg@compulab.co.il>
4 *
5 * Configuration settings for the CompuLab CM-T3517 board
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
13/*
14 * High Level Configuration Options
15 */
Igor Grinbergb09bf722014-11-05 14:25:35 +020016#define CONFIG_CM_T3517 /* working with CM-T3517 */
Igor Grinbergb09bf722014-11-05 14:25:35 +020017
18#define CONFIG_SYS_TEXT_BASE 0x80008000
19
20/*
21 * This is needed for the DMA stuff.
22 * Although the default iss 64, we still define it
23 * to be on the safe side once the default is changed.
24 */
Igor Grinbergb09bf722014-11-05 14:25:35 +020025
Igor Grinbergb09bf722014-11-05 14:25:35 +020026#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menon987ec582015-03-09 17:12:04 -050027#include <asm/arch/omap.h>
Igor Grinbergb09bf722014-11-05 14:25:35 +020028
Dmitry Lifshitzf3b44e82015-09-09 11:27:17 +030029#define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517
30
Igor Grinbergb09bf722014-11-05 14:25:35 +020031/* Clock Defines */
32#define V_OSCK 26000000 /* Clock output from T2 */
33#define V_SCLK (V_OSCK >> 1)
34
35#define CONFIG_MISC_INIT_R
36
Igor Grinbergb09bf722014-11-05 14:25:35 +020037/*
38 * The early kernel mapping on ARM currently only maps from the base of DRAM
39 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000.
40 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
41 * so that leaves DRAM base to DRAM base + 0x4000 available.
42 */
43#define CONFIG_SYS_BOOTMAPSZ 0x4000
44
45#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
46#define CONFIG_SETUP_MEMORY_TAGS
47#define CONFIG_INITRD_TAG
48#define CONFIG_REVISION_TAG
49#define CONFIG_SERIAL_TAG
50
51/*
52 * Size of malloc() pool
53 */
Dmitry Lifshitz2f6e4bf2015-09-09 11:25:39 +030054#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
Igor Grinbergb09bf722014-11-05 14:25:35 +020055#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
56
57/*
58 * Hardware drivers
59 */
60
61/*
62 * NS16550 Configuration
63 */
Igor Grinbergb09bf722014-11-05 14:25:35 +020064#define CONFIG_SYS_NS16550_SERIAL
65#define CONFIG_SYS_NS16550_REG_SIZE (-4)
66#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
67
68/*
69 * select serial console configuration
70 */
71#define CONFIG_CONS_INDEX 3
72#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
73#define CONFIG_SERIAL3 3 /* UART3 */
Igor Grinbergb09bf722014-11-05 14:25:35 +020074
75/* allow to overwrite serial and ethaddr */
76#define CONFIG_ENV_OVERWRITE
Igor Grinbergb09bf722014-11-05 14:25:35 +020077#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
78 115200}
79
Igor Grinberg011f5c12014-11-03 11:32:25 +020080/* USB */
81#define CONFIG_USB_MUSB_AM35X
82
83#ifndef CONFIG_USB_MUSB_AM35X
84#define CONFIG_USB_OMAP3
Igor Grinberg011f5c12014-11-03 11:32:25 +020085#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
86#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
87#else /* !CONFIG_USB_MUSB_AM35X */
Paul Kocialkowski95de1e22015-08-04 17:04:06 +020088#define CONFIG_USB_MUSB_PIO_ONLY
Igor Grinberg011f5c12014-11-03 11:32:25 +020089#endif /* CONFIG_USB_MUSB_AM35X */
90
Igor Grinbergb09bf722014-11-05 14:25:35 +020091/* commands to include */
Igor Grinbergb09bf722014-11-05 14:25:35 +020092#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
93#define CONFIG_MTD_PARTITIONS
Igor Grinbergb09bf722014-11-05 14:25:35 +020094
Igor Grinbergb09bf722014-11-05 14:25:35 +020095#define CONFIG_SYS_I2C
96#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
97#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
Igor Grinbergb09bf722014-11-05 14:25:35 +020098#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
99#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
100#define CONFIG_SYS_I2C_EEPROM_BUS 0
101#define CONFIG_I2C_MULTI_BUS
102
103/*
104 * Board NAND Info.
105 */
Igor Grinbergb09bf722014-11-05 14:25:35 +0200106#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
107 /* to access nand */
108#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
109 /* to access nand at */
110 /* CS0 */
111#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
112 /* devices */
113
114/* Environment information */
Igor Grinbergb09bf722014-11-05 14:25:35 +0200115#define CONFIG_EXTRA_ENV_SETTINGS \
116 "loadaddr=0x82000000\0" \
117 "baudrate=115200\0" \
118 "console=ttyO2,115200n8\0" \
Dmitry Lifshitze093d0b2015-09-08 09:50:00 +0300119 "netretry=yes\0" \
Igor Grinbergb09bf722014-11-05 14:25:35 +0200120 "mpurate=auto\0" \
121 "vram=12M\0" \
122 "dvimode=1024x768MR-16@60\0" \
123 "defaultdisplay=dvi\0" \
124 "mmcdev=0\0" \
125 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
126 "mmcrootfstype=ext4\0" \
127 "nandroot=/dev/mtdblock4 rw\0" \
128 "nandrootfstype=ubifs\0" \
129 "mmcargs=setenv bootargs console=${console} " \
130 "mpurate=${mpurate} " \
131 "vram=${vram} " \
132 "omapfb.mode=dvi:${dvimode} " \
133 "omapdss.def_disp=${defaultdisplay} " \
134 "root=${mmcroot} " \
135 "rootfstype=${mmcrootfstype}\0" \
136 "nandargs=setenv bootargs console=${console} " \
137 "mpurate=${mpurate} " \
138 "vram=${vram} " \
139 "omapfb.mode=dvi:${dvimode} " \
140 "omapdss.def_disp=${defaultdisplay} " \
141 "root=${nandroot} " \
142 "rootfstype=${nandrootfstype}\0" \
143 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
144 "bootscript=echo Running bootscript from mmc ...; " \
145 "source ${loadaddr}\0" \
146 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
147 "mmcboot=echo Booting from mmc ...; " \
148 "run mmcargs; " \
149 "bootm ${loadaddr}\0" \
150 "nandboot=echo Booting from nand ...; " \
151 "run nandargs; " \
152 "nand read ${loadaddr} 2a0000 400000; " \
153 "bootm ${loadaddr}\0" \
154
Igor Grinbergb09bf722014-11-05 14:25:35 +0200155#define CONFIG_BOOTCOMMAND \
156 "mmc dev ${mmcdev}; if mmc rescan; then " \
157 "if run loadbootscript; then " \
158 "run bootscript; " \
159 "else " \
160 "if run loaduimage; then " \
161 "run mmcboot; " \
162 "else run nandboot; " \
163 "fi; " \
164 "fi; " \
165 "else run nandboot; fi"
166
167/*
168 * Miscellaneous configurable options
169 */
170#define CONFIG_AUTO_COMPLETE
171#define CONFIG_CMDLINE_EDITING
172#define CONFIG_TIMESTAMP
173#define CONFIG_SYS_AUTOLOAD "no"
174#define CONFIG_SYS_LONGHELP /* undef to save memory */
Igor Grinbergb09bf722014-11-05 14:25:35 +0200175#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Igor Grinbergb09bf722014-11-05 14:25:35 +0200176#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
Igor Grinbergb09bf722014-11-05 14:25:35 +0200177
178#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
179
180/*
181 * AM3517 has 12 GP timers, they can be driven by the system clock
182 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
183 * This rate is divided by a local divisor.
184 */
185#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
186#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
187#define CONFIG_SYS_HZ 1000
188
189/*-----------------------------------------------------------------------
190 * Physical Memory Map
191 */
192#define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */
193#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
194#define CONFIG_SYS_CS0_SIZE (256 << 20)
195
196/*-----------------------------------------------------------------------
197 * FLASH and environment organization
198 */
199
200/* **** PISMO SUPPORT *** */
201/* Monitor at start of flash */
202#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
203#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
204
Adam Ford7672d9d2017-09-04 21:08:02 -0500205#define CONFIG_ENV_OFFSET 0x260000
206#define CONFIG_ENV_ADDR 0x260000
Igor Grinbergb09bf722014-11-05 14:25:35 +0200207
Igor Grinberga8a78c72014-11-03 11:32:26 +0200208#if defined(CONFIG_CMD_NET)
209#define CONFIG_DRIVER_TI_EMAC
210#define CONFIG_DRIVER_TI_EMAC_USE_RMII
211#define CONFIG_MII
Dmitry Lifshitze093d0b2015-09-08 09:50:00 +0300212#define CONFIG_ARP_TIMEOUT 200UL
213#define CONFIG_NET_RETRY_COUNT 5
Igor Grinberga8a78c72014-11-03 11:32:26 +0200214#endif /* CONFIG_CMD_NET */
215
Igor Grinbergb09bf722014-11-05 14:25:35 +0200216/* additions for new relocation code, must be added to all boards */
217#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
218#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
219#define CONFIG_SYS_INIT_RAM_SIZE 0x800
220#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
221 CONFIG_SYS_INIT_RAM_SIZE - \
222 GENERATED_GBL_DATA_SIZE)
223
224/* Status LED */
Igor Grinbergb09bf722014-11-05 14:25:35 +0200225#define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */
Igor Grinbergb09bf722014-11-05 14:25:35 +0200226
Igor Grinberg40bbd522014-11-03 11:32:27 +0200227/* Display Configuration */
Igor Grinberg40bbd522014-11-03 11:32:27 +0200228#define CONFIG_VIDEO_OMAP3
229#define LCD_BPP LCD_COLOR16
230
Igor Grinberg40bbd522014-11-03 11:32:27 +0200231#define CONFIG_SPLASH_SCREEN
232#define CONFIG_SPLASHIMAGE_GUARD
Igor Grinberg40bbd522014-11-03 11:32:27 +0200233#define CONFIG_BMP_16BPP
234#define CONFIG_SCF0403_LCD
235
Nikita Kiryanov19a90ed2016-04-16 17:55:08 +0300236/* EEPROM */
Nikita Kiryanov19a90ed2016-04-16 17:55:08 +0300237#define CONFIG_ENV_EEPROM_IS_ON_I2C
238#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
239#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
240#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
241#define CONFIG_SYS_EEPROM_SIZE 256
242
Igor Grinbergb09bf722014-11-05 14:25:35 +0200243#endif /* __CONFIG_H */