blob: 8b78f084e9da8053b53986ec04430467c87ce27b [file] [log] [blame]
Alexander Graffa08d392014-04-11 17:09:45 +02001/*
2 * Copyright 2011-2014 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7/*
8 * Corenet DS style board configuration file
9 */
10#ifndef __QEMU_PPCE500_H
11#define __QEMU_PPCE500_H
12
Alexander Graffa08d392014-04-11 17:09:45 +020013#undef CONFIG_SYS_TEXT_BASE
14#define CONFIG_SYS_TEXT_BASE 0xf01000 /* 15 MB */
Alexander Graffa08d392014-04-11 17:09:45 +020015
16#define CONFIG_SYS_MPC85XX_NO_RESETVEC
17
18#define CONFIG_SYS_RAMBOOT
19
Alexander Graffa08d392014-04-11 17:09:45 +020020#define CONFIG_PCI1 1 /* PCI controller 1 */
21#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
22#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
23
24#define CONFIG_ENV_OVERWRITE
25
26#define CONFIG_ENABLE_36BIT_PHYS
27
28#define CONFIG_ADDR_MAP
29#define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
30
31#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
32#define CONFIG_SYS_MEMTEST_END 0x00400000
33#define CONFIG_SYS_ALT_MEMTEST
Alexander Graffa08d392014-04-11 17:09:45 +020034
35/* Needed to fill the ccsrbar pointer */
Alexander Graffa08d392014-04-11 17:09:45 +020036
37/* Virtual address to CCSRBAR */
38#define CONFIG_SYS_CCSRBAR 0xe0000000
39/* Physical address should be a function call */
40#ifndef __ASSEMBLY__
41extern unsigned long long get_phys_ccsrbar_addr_early(void);
Alexander Grafe8349752015-03-07 02:10:09 +010042#define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32)
43#define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early()
44#else
45#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0
46#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
Alexander Graffa08d392014-04-11 17:09:45 +020047#endif
Alexander Grafe8349752015-03-07 02:10:09 +010048
Alexander Graffa08d392014-04-11 17:09:45 +020049/* Virtual address range for PCI region maps */
50#define CONFIG_SYS_PCI_MAP_START 0x80000000
51#define CONFIG_SYS_PCI_MAP_END 0xe8000000
52
53/* Virtual address to a temporary map if we need it (max 128MB) */
54#define CONFIG_SYS_TMPVIRT 0xe8000000
55
56/*
57 * DDR Setup
58 */
59#define CONFIG_VERY_BIG_RAM
60#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
61#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
62
63#define CONFIG_CHIP_SELECTS_PER_CTRL 0
64
65#define CONFIG_SYS_CLK_FREQ 33000000
66
Alexander Graffa08d392014-04-11 17:09:45 +020067#define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */
68
69#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
70
Alexander Graffa08d392014-04-11 17:09:45 +020071#define CONFIG_HWCONFIG
72
73#define CONFIG_SYS_INIT_RAM_ADDR 0x00100000
74#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0
75#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000
76/* The assembler doesn't like typecast */
77#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
78 ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
79 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
80#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
81
82#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
83 GENERATED_GBL_DATA_SIZE)
84#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
85
86#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
87#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
88
89#define CONFIG_CONS_INDEX 1
Alexander Graffa08d392014-04-11 17:09:45 +020090#define CONFIG_SYS_NS16550_SERIAL
91#define CONFIG_SYS_NS16550_REG_SIZE 1
92#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
93
94#define CONFIG_SYS_BAUDRATE_TABLE \
95 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
96
97#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
98#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
99
Alexander Graffa08d392014-04-11 17:09:45 +0200100/*
101 * General PCI
102 * Memory space is mapped 1-1, but I/O space must start from 0.
103 */
104
105#ifdef CONFIG_PCI
106#define CONFIG_PCI_INDIRECT_BRIDGE
Alexander Graffa08d392014-04-11 17:09:45 +0200107
108#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
Alexander Graffa08d392014-04-11 17:09:45 +0200109#endif /* CONFIG_PCI */
110
111#define CONFIG_LBA48
Alexander Graffa08d392014-04-11 17:09:45 +0200112
113/*
114 * Environment
115 */
116#define CONFIG_ENV_SIZE 0x2000
117
118#define CONFIG_LOADS_ECHO /* echo on for serial download */
119
120#define CONFIG_LAST_STAGE_INIT
121
122/*
123 * Command line configuration.
124 */
Alexander Graffa08d392014-04-11 17:09:45 +0200125
Alexander Graffa08d392014-04-11 17:09:45 +0200126/*
127 * Miscellaneous configurable options
128 */
129#define CONFIG_SYS_LONGHELP /* undef to save memory */
130#define CONFIG_CMDLINE_EDITING /* Command-line editing */
131#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
132#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
Alexander Graffa08d392014-04-11 17:09:45 +0200133
134/*
135 * For booting Linux, the board info and command line data
136 * have to be in the first 64 MB of memory, since this is
137 * the maximum mapped by the Linux kernel during initialization.
138 */
139#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/
140#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
141
142/*
143 * Environment Configuration
144 */
145#define CONFIG_ROOTPATH "/opt/nfsroot"
146#define CONFIG_BOOTFILE "uImage"
147#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
148
149/* default location for tftp and bootm */
150#define CONFIG_LOADADDR 1000000
151
Alexander Graffa08d392014-04-11 17:09:45 +0200152#define CONFIG_BOOTCOMMAND \
153 "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0"
154
155#endif /* __QEMU_PPCE500_H */