| Wu, Josh | bdfd59a | 2012-08-23 00:05:36 +0000 | [diff] [blame^] | 1 | How to enable PMECC(Programmable Multibit ECC) for nand on Atmel SoCs |
| 2 | ----------------------------------------------------------- |
| 3 | 2012-08-22 Josh Wu <josh.wu@atmel.com> |
| 4 | |
| 5 | The Programmable Multibit ECC (PMECC) controller is a programmable binary |
| 6 | BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller |
| 7 | can be used to support both SLC and MLC NAND Flash devices. It supports to |
| 8 | generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector (512 or |
| 9 | 1024 bytes) of data. |
| 10 | |
| 11 | Following Atmel AT91 products support PMECC. |
| 12 | - AT91SAM9X25, X35, G25, G15, G35 (tested) |
| 13 | - AT91SAM9N12 (not tested, Should work) |
| 14 | |
| 15 | As soon as your nand flash software ECC works, you can enable PMECC. |
| 16 | |
| 17 | To use PMECC in this driver, the user needs to set: |
| 18 | 1. the PMECC correction error bits capability: CONFIG_PMECC_CAP. |
| 19 | It can be 2, 4, 8, 12 or 24. |
| 20 | 2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE. |
| 21 | It only can be 512 or 1024. |
| 22 | 3. The PMECC index lookup table's offsets in ROM code: CONFIG_PMECC_INDEX_TABLE_OFFSET. |
| 23 | In the chip datasheet section "Boot Stragegies", you can find |
| 24 | two Galois Field Table in the ROM code. One table is for 512-bytes |
| 25 | sector. Another is for 1024-byte sector. Each Galois Field includes |
| 26 | two sub-table: indext table & alpha table. |
| 27 | In the beginning of each Galois Field Table is the index table, |
| 28 | Alpha table is in the following. |
| 29 | So the index table's offset is same as the Galois Field Table. |
| 30 | |
| 31 | Please set CONFIG_PMECC_INDEX_TABLE_OFFSET correctly according the |
| 32 | Galois Field Table's offset base on the sector size you used. |
| 33 | |
| 34 | Take AT91SAM9X5EK as an example, the board definition file likes: |
| 35 | |
| 36 | /* PMECC & PMERRLOC */ |
| 37 | #define CONFIG_ATMEL_NAND_HWECC 1 |
| 38 | #define CONFIG_ATMEL_NAND_HW_PMECC 1 |
| 39 | #define CONFIG_PMECC_CAP 2 |
| 40 | #define CONFIG_PMECC_SECTOR_SIZE 512 |
| 41 | #define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000 |
| 42 | |
| 43 | NOTE: If you use 1024 as the sector size, then need set 0x10000 as the |
| 44 | CONFIG_PMECC_INDEX_TABLE_OFFSET |