blob: 2b3ea6da88dbc2206d5e7bde85b279c926d6647d [file] [log] [blame]
Peter Robinsonab800e52020-01-20 09:18:18 +00001// SPDX-License-Identifier: GPL-2.0+
2
3#include "rk3399-u-boot.dtsi"
Heiko Stuebner97fa7842020-06-05 12:06:40 +02004
5#ifdef CONFIG_TARGET_PUMA_RK3399_RAM_DDR3_1333
6#include "rk3399-sdram-ddr3-1333.dtsi"
7#endif
8#ifdef CONFIG_TARGET_PUMA_RK3399_RAM_DDR3_1600
9#include "rk3399-sdram-ddr3-1600.dtsi"
10#endif
11#ifdef CONFIG_TARGET_PUMA_RK3399_RAM_DDR3_1866
12#include "rk3399-sdram-ddr3-1866.dtsi"
13#endif
14
Peter Robinsonab800e52020-01-20 09:18:18 +000015/ {
Heiko Stuebnerefcb2bd2020-06-05 12:06:38 +020016 config {
Quentin Schulz2169e292022-09-15 11:14:29 +020017 u-boot,spl-payload-offset = <0x80000>; /* @ 512KB */
Quentin Schulzc74f6e72022-10-25 12:58:02 +020018 u-boot,mmc-env-offset = <0x5000>; /* @ 20KB */
Heiko Stuebnerefcb2bd2020-06-05 12:06:38 +020019 u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */
20 u-boot,boot-led = "module_led";
21 sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
22 };
Peter Robinsonab800e52020-01-20 09:18:18 +000023
Heiko Stuebnerefcb2bd2020-06-05 12:06:38 +020024 chosen {
25 stdout-path = "serial0:115200n8";
26 u-boot,spl-boot-order = \
Jagan Teki167efc22020-04-28 15:30:17 +053027 "same-as-spl", &norflash, &sdhci, &sdmmc;
Heiko Stuebnerefcb2bd2020-06-05 12:06:38 +020028 };
Peter Robinsonab800e52020-01-20 09:18:18 +000029
Heiko Stuebnerefcb2bd2020-06-05 12:06:38 +020030 aliases {
Hugh Cole-Bakera2ca3c62020-11-22 13:03:46 +000031 spi5 = &spi5;
Heiko Stuebnerefcb2bd2020-06-05 12:06:38 +020032 };
Peter Robinsonab800e52020-01-20 09:18:18 +000033
Christoph Muellner1621afc2021-02-19 01:29:48 +010034 vdd_log: vdd-log {
35 compatible = "pwm-regulator";
36 pwms = <&pwm2 0 25000 1>;
37 regulator-name = "vdd_log";
38 regulator-always-on;
39 regulator-boot-on;
40 regulator-min-microvolt = <800000>;
41 regulator-max-microvolt = <1400000>;
42 regulator-init-microvolt = <950000>;
43 vin-supply = <&vcc5v0_sys>;
44 };
Jagan Teki4888fbe2020-04-28 15:30:14 +053045};
46
Quentin Schulz35f571b2022-09-15 11:14:30 +020047&binman {
48 simple-bin {
Simon Glasse0c0eff2023-01-07 14:07:18 -070049 fit {
Quentin Schulz35f571b2022-09-15 11:14:30 +020050 offset = <((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512)>;
51 };
52 };
Quentin Schulzbd9b4ac2022-09-15 11:14:32 +020053
54#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
55 simple-bin-spi {
Simon Glasse0c0eff2023-01-07 14:07:18 -070056 fit {
Quentin Schulzbd9b4ac2022-09-15 11:14:32 +020057 /* same as u-boot,spl-payload-offset */
58 offset = <0x80000>;
59 };
60 };
61#endif
Quentin Schulz35f571b2022-09-15 11:14:30 +020062};
63
Jagan Teki4888fbe2020-04-28 15:30:14 +053064&gpio1 {
Simon Glass8c103c32023-02-13 08:56:33 -070065 bootph-all;
Jagan Teki4888fbe2020-04-28 15:30:14 +053066};
67
68&gpio3 {
Simon Glass8c103c32023-02-13 08:56:33 -070069 bootph-all;
Quentin Schulzc9bc7f92022-09-15 11:14:22 +020070
71 /*
72 * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module
73 * eMMC and SPI flash powered-down initially (in fact it keeps the
74 * reset signal asserted). BIOS_DISABLE_OVERRIDE pin allows to re-enable
75 * eMMC and SPI after the SPL has been booted from SD Card.
76 */
77 bios_disable_override {
Simon Glass8c103c32023-02-13 08:56:33 -070078 bootph-all;
Quentin Schulzc9bc7f92022-09-15 11:14:22 +020079 gpios = <RK_PD5 GPIO_ACTIVE_LOW>;
80 output-high;
81 line-name = "bios_disable_override";
82 gpio-hog;
83 };
Jagan Teki4888fbe2020-04-28 15:30:14 +053084};
85
Quentin Schulze936e0e2022-09-15 11:14:23 +020086&gpio4 {
Simon Glass8c103c32023-02-13 08:56:33 -070087 bootph-all;
Quentin Schulze936e0e2022-09-15 11:14:23 +020088};
89
Jagan Teki167efc22020-04-28 15:30:17 +053090&norflash {
Simon Glass8c103c32023-02-13 08:56:33 -070091 bootph-all;
Jagan Teki4888fbe2020-04-28 15:30:14 +053092};
Quentin Schulze936e0e2022-09-15 11:14:23 +020093
94&pcfg_pull_none {
Simon Glass8c103c32023-02-13 08:56:33 -070095 bootph-all;
Quentin Schulze936e0e2022-09-15 11:14:23 +020096};
97
98&pcfg_pull_up {
Simon Glass8c103c32023-02-13 08:56:33 -070099 bootph-all;
Quentin Schulze936e0e2022-09-15 11:14:23 +0200100};
101
102&sdmmc_bus4 {
Simon Glass8c103c32023-02-13 08:56:33 -0700103 bootph-all;
Quentin Schulze936e0e2022-09-15 11:14:23 +0200104};
105
106&sdmmc_clk {
Simon Glass8c103c32023-02-13 08:56:33 -0700107 bootph-all;
Quentin Schulze936e0e2022-09-15 11:14:23 +0200108};
109
110&sdmmc_cmd {
Simon Glass8c103c32023-02-13 08:56:33 -0700111 bootph-all;
Quentin Schulze936e0e2022-09-15 11:14:23 +0200112};