blob: ce71ee9bc9260b48519dc8c96c135f101a63110c [file] [log] [blame]
wdenkd62589d2002-08-20 21:10:12 +00001/*
2 * (C) Copyright 2000-2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkd62589d2002-08-20 21:10:12 +00006 */
7
8/*
9 * This file contains all the macros and symbols which define
10 * a PowerPC assembly language environment.
11 */
12#ifndef __PPC_ASM_TMPL__
13#define __PPC_ASM_TMPL__
14
Scott Wood96d2bb92015-04-07 20:20:00 -050015#include <config.h>
16
wdenkd62589d2002-08-20 21:10:12 +000017/***************************************************************************
18 *
19 * These definitions simplify the ugly declarations necessary for GOT
20 * definitions.
21 *
22 * Stolen from prepboot/bootldr.h, (C) 1998 Gabriel Paubert, paubert@iram.es
23 *
Heiko Schocher161e4ae2010-06-17 07:01:40 +020024 * Uses r12 to access the GOT
wdenkd62589d2002-08-20 21:10:12 +000025 */
26
27#define START_GOT \
28 .section ".got2","aw"; \
29.LCTOC1 = .+32768
30
31#define END_GOT \
32 .text
33
34#define GET_GOT \
35 bl 1f ; \
36 .text 2 ; \
370: .long .LCTOC1-1f ; \
38 .text ; \
Joakim Tjernlund0f8aa152010-01-19 14:41:56 +0100391: mflr r12 ; \
40 lwz r0,0b-1b(r12) ; \
41 add r12,r0,r12 ;
wdenkd62589d2002-08-20 21:10:12 +000042
43#define GOT_ENTRY(NAME) .L_ ## NAME = . - .LCTOC1 ; .long NAME
44
Joakim Tjernlund0f8aa152010-01-19 14:41:56 +010045#define GOT(NAME) .L_ ## NAME (r12)
wdenkd62589d2002-08-20 21:10:12 +000046
47
48/***************************************************************************
49 * Register names
50 */
51#define r0 0
52#define r1 1
53#define r2 2
54#define r3 3
55#define r4 4
56#define r5 5
57#define r6 6
58#define r7 7
59#define r8 8
60#define r9 9
61#define r10 10
62#define r11 11
63#define r12 12
64#define r13 13
65#define r14 14
66#define r15 15
67#define r16 16
68#define r17 17
69#define r18 18
70#define r19 19
71#define r20 20
72#define r21 21
73#define r22 22
74#define r23 23
75#define r24 24
76#define r25 25
77#define r26 26
78#define r27 27
79#define r28 28
80#define r29 29
81#define r30 30
82#define r31 31
83
wdenkd62589d2002-08-20 21:10:12 +000084#define curptr r2
85
86#define SYNC \
87 sync; \
88 isync
89
90/*
91 * Macros for storing registers into and loading registers from
92 * exception frames.
93 */
94#define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base)
95#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
96#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
97#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
98#define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
99#define REST_GPR(n, base) lwz n,GPR0+4*(n)(base)
100#define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base)
101#define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base)
102#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base)
103#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base)
104
105/*
106 * GCC sometimes accesses words at negative offsets from the stack
107 * pointer, although the SysV ABI says it shouldn't. To cope with
108 * this, we leave this much untouched space on the stack on exception
109 * entry.
110 */
111#define STACK_UNDERHEAD 64
112
113/*
114 * Exception entry code. This code runs with address translation
115 * turned off, i.e. using physical addresses.
116 * We assume sprg3 has the physical address of the current
117 * task's thread_struct.
118 */
Grzegorz Bernackiefa35cf2007-06-15 11:19:28 +0200119#define EXCEPTION_PROLOG(reg1, reg2) \
wdenkd62589d2002-08-20 21:10:12 +0000120 mtspr SPRG0,r20; \
121 mtspr SPRG1,r21; \
122 mfcr r20; \
123 subi r21,r1,INT_FRAME_SIZE+STACK_UNDERHEAD; /* alloc exc. frame */\
124 stw r20,_CCR(r21); /* save registers */ \
125 stw r22,GPR22(r21); \
126 stw r23,GPR23(r21); \
127 mfspr r20,SPRG0; \
128 stw r20,GPR20(r21); \
129 mfspr r22,SPRG1; \
130 stw r22,GPR21(r21); \
131 mflr r20; \
132 stw r20,_LINK(r21); \
133 mfctr r22; \
134 stw r22,_CTR(r21); \
135 mfspr r20,XER; \
136 stw r20,_XER(r21); \
Rafal Jaworowskicc3023b2007-07-19 17:12:28 +0200137 mfspr r20, DAR_DEAR; \
Grzegorz Bernackiefa35cf2007-06-15 11:19:28 +0200138 stw r20,_DAR(r21); \
139 mfspr r22,reg1; \
140 mfspr r23,reg2; \
wdenkd62589d2002-08-20 21:10:12 +0000141 stw r0,GPR0(r21); \
142 stw r1,GPR1(r21); \
143 stw r2,GPR2(r21); \
144 stw r1,0(r21); \
145 mr r1,r21; /* set new kernel sp */ \
146 SAVE_4GPRS(3, r21);
147/*
148 * Note: code which follows this uses cr0.eq (set if from kernel),
149 * r21, r22 (SRR0), and r23 (SRR1).
150 */
151
152/*
wdenkd62589d2002-08-20 21:10:12 +0000153 * Exception vectors.
154 *
155 * The data words for `hdlr' and `int_return' are initialized with
156 * OFFSET values only; they must be relocated first before they can
157 * be used!
158 */
Joakim Tjernlundfc4e1882010-01-19 14:41:55 +0100159#define COPY_EE(d, s) rlwimi d,s,0,16,16
160#define NOCOPY(d, s)
Scott Wood96d2bb92015-04-07 20:20:00 -0500161
162#ifdef CONFIG_E500
163#define EXC_XFER_TEMPLATE(n, label, hdlr, msr, copyee) \
164 stw r22,_NIP(r21); \
165 stw r23,_MSR(r21); \
166 li r23,n; \
167 stw r23,TRAP(r21); \
168 li r20,msr; \
169 copyee(r20,r23); \
170 rlwimi r20,r23,0,25,25; \
171 mtmsr r20; \
172 bl 1f; \
1731: mflr r23; \
174 addis r23,r23,(hdlr - 1b)@ha; \
175 addi r23,r23,(hdlr - 1b)@l; \
176 b transfer_to_handler
177
178#define STD_EXCEPTION(n, label, hdlr) \
mario.six@gdsys.cc50689462016-04-05 15:05:37 +0200179.align 4; \
Scott Wood96d2bb92015-04-07 20:20:00 -0500180label: \
181 EXCEPTION_PROLOG(SRR0, SRR1); \
182 addi r3,r1,STACK_FRAME_OVERHEAD; \
183 EXC_XFER_TEMPLATE(n, label, hdlr, MSR_KERNEL, NOCOPY) \
184
185#define CRIT_EXCEPTION(n, label, hdlr) \
mario.six@gdsys.cc50689462016-04-05 15:05:37 +0200186.align 4; \
Scott Wood96d2bb92015-04-07 20:20:00 -0500187label: \
188 EXCEPTION_PROLOG(CSRR0, CSRR1); \
189 addi r3,r1,STACK_FRAME_OVERHEAD; \
190 EXC_XFER_TEMPLATE(n, label, hdlr, \
191 MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \
192
193#define MCK_EXCEPTION(n, label, hdlr) \
mario.six@gdsys.cc50689462016-04-05 15:05:37 +0200194.align 4; \
Scott Wood96d2bb92015-04-07 20:20:00 -0500195label: \
196 EXCEPTION_PROLOG(MCSRR0, MCSRR1); \
197 addi r3,r1,STACK_FRAME_OVERHEAD; \
198 EXC_XFER_TEMPLATE(n, label, hdlr, \
199 MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \
200
201#else /* !E500 */
202
Joakim Tjernlundfc4e1882010-01-19 14:41:55 +0100203#define EXC_XFER_TEMPLATE(label, hdlr, msr, copyee) \
204 bl 1f; \
2051: mflr r20; \
206 lwz r20,(.L_ ## label)-1b+8(r20); \
207 mtlr r20; \
208 li r20,msr; \
209 copyee(r20,r23); \
wdenkd62589d2002-08-20 21:10:12 +0000210 rlwimi r20,r23,0,25,25; \
Wolfgang Denk83b4cfa2007-06-20 18:14:24 +0200211 blrl; \
wdenkd62589d2002-08-20 21:10:12 +0000212.L_ ## label : \
Grzegorz Bernackiefa35cf2007-06-15 11:19:28 +0200213 .long hdlr - _start + _START_OFFSET; \
Joakim Tjernlundfc4e1882010-01-19 14:41:55 +0100214 .long int_return - _start + _START_OFFSET; \
215 .long transfer_to_handler - _start + _START_OFFSET
216
217#define STD_EXCEPTION(n, label, hdlr) \
218 . = n; \
219label: \
220 EXCEPTION_PROLOG(SRR0, SRR1); \
221 addi r3,r1,STACK_FRAME_OVERHEAD; \
222 EXC_XFER_TEMPLATE(label, hdlr, MSR_KERNEL, NOCOPY) \
wdenkd62589d2002-08-20 21:10:12 +0000223
Grzegorz Bernackiefa35cf2007-06-15 11:19:28 +0200224#define CRIT_EXCEPTION(n, label, hdlr) \
Wolfgang Denk83b4cfa2007-06-20 18:14:24 +0200225 . = n; \
Grzegorz Bernackiefa35cf2007-06-15 11:19:28 +0200226label: \
Rafal Jaworowski02032e82007-06-22 14:58:04 +0200227 EXCEPTION_PROLOG(CSRR0, CSRR1); \
Wolfgang Denk83b4cfa2007-06-20 18:14:24 +0200228 addi r3,r1,STACK_FRAME_OVERHEAD; \
Joakim Tjernlundfc4e1882010-01-19 14:41:55 +0100229 EXC_XFER_TEMPLATE(label, hdlr, \
230 MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \
wdenkd62589d2002-08-20 21:10:12 +0000231
Grzegorz Bernackiefa35cf2007-06-15 11:19:28 +0200232#define MCK_EXCEPTION(n, label, hdlr) \
Wolfgang Denk83b4cfa2007-06-20 18:14:24 +0200233 . = n; \
Grzegorz Bernackiefa35cf2007-06-15 11:19:28 +0200234label: \
Wolfgang Denk83b4cfa2007-06-20 18:14:24 +0200235 EXCEPTION_PROLOG(MCSRR0, MCSRR1); \
Wolfgang Denk83b4cfa2007-06-20 18:14:24 +0200236 addi r3,r1,STACK_FRAME_OVERHEAD; \
Joakim Tjernlundfc4e1882010-01-19 14:41:55 +0100237 EXC_XFER_TEMPLATE(label, hdlr, \
238 MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \
wdenkd62589d2002-08-20 21:10:12 +0000239
Scott Wood96d2bb92015-04-07 20:20:00 -0500240#endif /* !E500 */
wdenkd62589d2002-08-20 21:10:12 +0000241#endif /* __PPC_ASM_TMPL__ */