blob: 8f10eba4677cefa5d8888a2dda1da19b6f5d7011 [file] [log] [blame]
Mike Frysinger8a9bab02008-10-12 21:41:06 -04001/*
2 * U-boot - Configuration file for CM-BF537E board
3 */
4
5#ifndef __CONFIG_CM_BF537E_H__
6#define __CONFIG_CM_BF537E_H__
7
Mike Frysingerf348ab82009-04-24 17:22:40 -04008#include <asm/config-pre.h>
Mike Frysinger8a9bab02008-10-12 21:41:06 -04009
10
11/*
12 * Processor Settings
13 */
Mike Frysingerfbcf8e82010-12-23 14:58:37 -050014#define CONFIG_BFIN_CPU bf537-0.2
Mike Frysinger8a9bab02008-10-12 21:41:06 -040015#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
16
17
18/*
19 * Clock Settings
20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
22 */
23/* CONFIG_CLKIN_HZ is any value in Hz */
24#define CONFIG_CLKIN_HZ 25000000
25/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
26/* 1 = CLKIN / 2 */
27#define CONFIG_CLKIN_HALF 0
28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
29/* 1 = bypass PLL */
30#define CONFIG_PLL_BYPASS 0
31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
32/* Values can range from 0-63 (where 0 means 64) */
33#define CONFIG_VCO_MULT 21
34/* CCLK_DIV controls the core clock divider */
35/* Values can be 1, 2, 4, or 8 ONLY */
36#define CONFIG_CCLK_DIV 1
37/* SCLK_DIV controls the system clock divider */
38/* Values can range from 1-15 */
39#define CONFIG_SCLK_DIV 4
40
Harald Krapfenbauerfd04a052009-10-14 08:37:32 -040041/* Decrease core voltage */
42#define CONFIG_VR_CTL_VAL (VLEV_115 | CLKBUFOE | GAIN_20 | FREQ_1000)
43
Mike Frysinger8a9bab02008-10-12 21:41:06 -040044
45/*
46 * Memory Settings
47 */
48#define CONFIG_MEM_ADD_WDTH 9
49#define CONFIG_MEM_SIZE 32
50
51#define CONFIG_EBIU_SDRRC_VAL 0x3f8
52#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
53
54#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
55#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
56#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
57
Harald Krapfenbauerc94101a2011-05-17 15:39:54 -040058#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
Mike Frysinger8a9bab02008-10-12 21:41:06 -040059#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
60
61
62/*
63 * Network Settings
64 */
65#ifndef __ADSPBF534__
66#define ADI_CMDS_NETWORK 1
67#define CONFIG_BFIN_MAC
Harald Krapfenbauerfff18be2011-05-17 15:25:54 -040068#define CONFIG_SMC911X 1
69#define CONFIG_SMC911X_BASE 0x20308000
70#define CONFIG_SMC911X_16_BIT
Mike Frysinger8a9bab02008-10-12 21:41:06 -040071#define CONFIG_NETCONSOLE 1
Mike Frysinger8a9bab02008-10-12 21:41:06 -040072#endif
73#define CONFIG_HOSTNAME cm-bf537e
74/* Uncomment next line to use fixed MAC address */
75/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
76
77
78/*
79 * Flash Settings
80 */
81#define CONFIG_FLASH_CFI_DRIVER
82#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
83#define CONFIG_SYS_FLASH_BASE 0x20000000
84#define CONFIG_SYS_FLASH_CFI
85#define CONFIG_SYS_FLASH_PROTECTION
86#define CONFIG_SYS_MAX_FLASH_BANKS 1
Harald Krapfenbauerc2fbcb62009-08-18 04:49:57 -040087#define CONFIG_SYS_MAX_FLASH_SECT 35
Mike Frysinger8a9bab02008-10-12 21:41:06 -040088
89
90/*
Harald Krapfenbauerc94101a2011-05-17 15:39:54 -040091 * SPI Settings
92 */
93#define CONFIG_BFIN_SPI
94#define CONFIG_ENV_SPI_MAX_HZ 30000000
95
96
97/*
Mike Frysinger8a9bab02008-10-12 21:41:06 -040098 * Env Storage Settings
99 */
100#define CONFIG_ENV_IS_IN_FLASH 1
Harald Krapfenbauerba5c1222011-05-17 15:45:36 -0400101#define CONFIG_ENV_OFFSET 0x8000
102#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
103#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
104#define CONFIG_ENV_SECT_SIZE 0x8000
Mike Frysinger8a9bab02008-10-12 21:41:06 -0400105#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
106#define ENV_IS_EMBEDDED
Mike Frysinger8a9bab02008-10-12 21:41:06 -0400107#endif
Mike Frysinger9ff67e52009-06-14 06:29:07 -0400108#ifdef ENV_IS_EMBEDDED
109/* WARNING - the following is hand-optimized to fit within
110 * the sector before the environment sector. If it throws
111 * an error during compilation remove an object here to get
112 * it linked after the configuration sector.
113 */
114# define LDS_BOARD_TEXT \
Masahiro Yamadae2906a52013-11-11 14:36:00 +0900115 arch/blackfin/lib/built-in.o (.text*); \
116 arch/blackfin/cpu/built-in.o (.text*); \
Mike Frysinger9ff67e52009-06-14 06:29:07 -0400117 . = DEFINED(env_offset) ? env_offset : .; \
Mike Frysingerc70e7dd2010-11-19 19:28:56 -0500118 common/env_embedded.o (.text*);
Mike Frysinger9ff67e52009-06-14 06:29:07 -0400119#endif
Mike Frysinger8a9bab02008-10-12 21:41:06 -0400120
121
122/*
123 * I2C Settings
124 */
125#define CONFIG_BFIN_TWI_I2C 1
126#define CONFIG_HARD_I2C 1
Mike Frysinger8a9bab02008-10-12 21:41:06 -0400127
128
129/*
Harald Krapfenbauerc94101a2011-05-17 15:39:54 -0400130 * SPI_MMC Settings
131 */
132#define CONFIG_MMC
133#define CONFIG_GENERIC_MMC
134#define CONFIG_MMC_SPI
135
136
137/*
Mike Frysinger8a9bab02008-10-12 21:41:06 -0400138 * Misc Settings
139 */
140#define CONFIG_BAUDRATE 115200
141#define CONFIG_MISC_INIT_R
142#define CONFIG_RTC_BFIN
143#define CONFIG_UART_CONSOLE 0
Harald Krapfenbauerfd04a052009-10-14 08:37:32 -0400144#define CONFIG_BOOTCOMMAND "run flashboot"
145#define FLASHBOOT_ENV_SETTINGS \
Harald Krapfenbauerba5c1222011-05-17 15:45:36 -0400146 "flashboot=flread 20040000 1000000 3c0000;" \
Harald Krapfenbauerfd04a052009-10-14 08:37:32 -0400147 "bootm 0x1000000\0"
Mike Frysinger8a9bab02008-10-12 21:41:06 -0400148
149
150/*
151 * Pull in common ADI header for remaining command/environment setup
152 */
153#include <configs/bfin_adi_common.h>
154
Mike Frysinger8a9bab02008-10-12 21:41:06 -0400155#endif