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Masahiro Yamada9d86b892020-02-14 16:40:19 +09001/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _LINUX_DMA_MAPPING_H
3#define _LINUX_DMA_MAPPING_H
4
Simon Glass6d39fcc2020-05-30 10:29:04 -06005#include <asm/cache.h>
Masahiro Yamada9d86b892020-02-14 16:40:19 +09006#include <linux/dma-direction.h>
7#include <linux/types.h>
8#include <asm/dma-mapping.h>
9#include <cpu_func.h>
10
11#define dma_mapping_error(x, y) 0
12
13/**
14 * Map a buffer to make it available to the DMA device
15 *
16 * Linux-like DMA API that is intended to be used from drivers. This hides the
17 * underlying cache operation from drivers. Call this before starting the DMA
18 * transfer. In most of architectures in U-Boot, the virtual address matches to
19 * the physical address (but we have exceptions like sandbox). U-Boot does not
20 * support iommu at the driver level, so it also matches to the DMA address.
21 * Hence, this helper currently just performs the cache operation, then returns
22 * straight-mapped dma_address, which is intended to be set to the register of
23 * the DMA device.
24 *
25 * @vaddr: address of the buffer
26 * @len: length of the buffer
27 * @dir: the direction of DMA
28 */
29static inline dma_addr_t dma_map_single(void *vaddr, size_t len,
30 enum dma_data_direction dir)
31{
32 unsigned long addr = (unsigned long)vaddr;
33
34 len = ALIGN(len, ARCH_DMA_MINALIGN);
35
36 if (dir == DMA_FROM_DEVICE)
37 invalidate_dcache_range(addr, addr + len);
38 else
39 flush_dcache_range(addr, addr + len);
40
41 return addr;
42}
43
44/**
45 * Unmap a buffer to make it available to CPU
46 *
47 * Linux-like DMA API that is intended to be used from drivers. This hides the
48 * underlying cache operation from drivers. Call this after finishin the DMA
49 * transfer.
50 *
51 * @addr: DMA address
52 * @len: length of the buffer
53 * @dir: the direction of DMA
54 */
55static inline void dma_unmap_single(dma_addr_t addr, size_t len,
56 enum dma_data_direction dir)
57{
58 len = ALIGN(len, ARCH_DMA_MINALIGN);
59
60 if (dir != DMA_TO_DEVICE)
61 invalidate_dcache_range(addr, addr + len);
62}
63
64#endif