| Matthias Fuchs | 15a08bc | 2008-01-17 10:52:30 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008 |
| 3 | * Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License as |
| 7 | * published by the Free Software Foundation; either version 2 of |
| 8 | * the License, or (at your option) any later version. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 18 | * MA 02111-1307 USA |
| 19 | */ |
| 20 | |
| 21 | #define SDR0_USB0 0x0320 /* USB Control Register */ |
| 22 | |
| 23 | #define CFG_GPIO0_EP_EEP (0x80000000 >> 23) /* GPIO0_23 */ |
| 24 | #define CFG_GPIO1_DCF77 (0x80000000 >> (42-32)) /* GPIO1_42 */ |
| 25 | |
| 26 | #define CFG_GPIO1_IORSTN (0x80000000 >> (55-32)) /* GPIO1_55 */ |
| Matthias Fuchs | 7c91f51 | 2008-03-30 18:01:15 +0200 | [diff] [blame] | 27 | #define CFG_GPIO1_IORST2N (0x80000000 >> (47-32)) /* GPIO1_47 */ |
| Matthias Fuchs | 15a08bc | 2008-01-17 10:52:30 +0100 | [diff] [blame] | 28 | |
| 29 | #define CFG_GPIO1_HWVER_MASK 0x000000f0 /* GPIO1_56-59 */ |
| 30 | #define CFG_GPIO1_HWVER_SHIFT 4 |
| 31 | #define CFG_GPIO1_LEDUSR1 0x00000008 /* GPIO1_60 */ |
| 32 | #define CFG_GPIO1_LEDUSR2 0x00000004 /* GPIO1_61 */ |
| 33 | #define CFG_GPIO1_LEDPOST 0x00000002 /* GPIO1_62 */ |
| 34 | #define CFG_GPIO1_LEDDU 0x00000001 /* GPIO1_63 */ |
| 35 | |
| 36 | #define CPLD_VERSION_MASK 0x0f |
| 37 | #define PWR_INT_FLAG 0x80 |
| 38 | #define PWR_RDY 0x10 |
| 39 | |
| 40 | #define CPLD_IRQ (32+30) |
| 41 | |
| 42 | #define PCI_VENDOR_ID_ESDGMBH 0x12fe |
| 43 | #define PCI_DEVICE_ID_DU440 0x0444 |