blob: a56e4dba77a332c60364a7fa74606a3458f81a47 [file] [log] [blame]
Siew Chin Lim05e1e3b2021-08-10 11:26:30 +08001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2020-2021, Intel Corporation
4 */
5
6#ifndef __N5X_CLOCK_H
7#define __N5X_CLOCK_H
8
9/* fixed rate clocks */
10#define N5X_OSC1 0
11#define N5X_CB_INTOSC_HS_DIV2_CLK 1
12#define N5X_CB_INTOSC_LS_CLK 2
13#define N5X_L4_SYS_FREE_CLK 3
14#define N5X_F2S_FREE_CLK 4
15
16/* PLL clocks */
17#define N5X_MAIN_PLL_CLK 5
18#define N5X_MAIN_PLL_C0_CLK 6
19#define N5X_MAIN_PLL_C1_CLK 7
20#define N5X_MAIN_PLL_C2_CLK 8
21#define N5X_MAIN_PLL_C3_CLK 9
22#define N5X_PERIPH_PLL_CLK 10
23#define N5X_PERIPH_PLL_C0_CLK 11
24#define N5X_PERIPH_PLL_C1_CLK 12
25#define N5X_PERIPH_PLL_C2_CLK 13
26#define N5X_PERIPH_PLL_C3_CLK 14
27#define N5X_MPU_FREE_CLK 15
28#define N5X_MPU_CCU_CLK 16
29#define N5X_BOOT_CLK 17
30
31/* fixed factor clocks */
32#define N5X_L3_MAIN_FREE_CLK 18
33#define N5X_NOC_FREE_CLK 19
34#define N5X_S2F_USR0_CLK 20
35#define N5X_NOC_CLK 21
36#define N5X_EMAC_A_FREE_CLK 22
37#define N5X_EMAC_B_FREE_CLK 23
38#define N5X_EMAC_PTP_FREE_CLK 24
39#define N5X_GPIO_DB_FREE_CLK 25
40#define N5X_SDMMC_FREE_CLK 26
41#define N5X_S2F_USER0_FREE_CLK 27
42#define N5X_S2F_USER1_FREE_CLK 28
43#define N5X_PSI_REF_FREE_CLK 29
44
45/* Gate clocks */
46#define N5X_MPU_CLK 30
47#define N5X_MPU_PERIPH_CLK 31
48#define N5X_L4_MAIN_CLK 32
49#define N5X_L4_MP_CLK 33
50#define N5X_L4_SP_CLK 34
51#define N5X_CS_AT_CLK 35
52#define N5X_CS_TRACE_CLK 36
53#define N5X_CS_PDBG_CLK 37
54#define N5X_CS_TIMER_CLK 38
55#define N5X_S2F_USER0_CLK 39
56#define N5X_EMAC0_CLK 40
57#define N5X_EMAC1_CLK 41
58#define N5X_EMAC2_CLK 42
59#define N5X_EMAC_PTP_CLK 43
60#define N5X_GPIO_DB_CLK 44
61#define N5X_NAND_CLK 45
62#define N5X_PSI_REF_CLK 46
63#define N5X_S2F_USER1_CLK 47
64#define N5X_SDMMC_CLK 48
65#define N5X_SPI_M_CLK 49
66#define N5X_USB_CLK 50
67#define N5X_NAND_X_CLK 51
68#define N5X_NAND_ECC_CLK 52
69#define N5X_NUM_CLKS 53
70
71#endif /* __N5X_CLOCK_H */