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Marek Vasutfc102722011-11-08 23:18:20 +00001/*
2 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
3 * on behalf of DENX Software Engineering GmbH
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
19 */
20#ifndef __M28_H__
21#define __M28_H__
22
23#include <asm/arch/regs-base.h>
24
25/*
26 * SoC configurations
27 */
28#define CONFIG_MX28 /* i.MX28 SoC */
29#define CONFIG_MXS_GPIO /* GPIO control */
30#define CONFIG_SYS_HZ 1000 /* Ticks per second */
31
32/*
33 * Define M28EVK machine type by hand until it lands in mach-types
34 */
35#define MACH_TYPE_M28EVK 3613
36
37#define CONFIG_MACH_TYPE MACH_TYPE_M28EVK
38
39#define CONFIG_SYS_NO_FLASH
40#define CONFIG_SYS_ICACHE_OFF
41#define CONFIG_SYS_DCACHE_OFF
42#define CONFIG_BOARD_EARLY_INIT_F
43#define CONFIG_ARCH_CPU_INIT
Marek Vasut22fe68f2011-11-08 23:18:23 +000044#define CONFIG_ARCH_MISC_INIT
Marek Vasutfc102722011-11-08 23:18:20 +000045
46/*
Marek Vasut04fe4272011-11-08 23:18:21 +000047 * SPL
48 */
49#define CONFIG_SPL
50#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
Marek Vasutc944a3e2011-12-02 03:47:40 +000051#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mx28"
52#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds"
Marek Vasut8ba16042011-12-08 09:46:12 +000053#define CONFIG_SPL_LIBCOMMON_SUPPORT
54#define CONFIG_SPL_LIBGENERIC_SUPPORT
Marek Vasut04fe4272011-11-08 23:18:21 +000055
56/*
Marek Vasutfc102722011-11-08 23:18:20 +000057 * U-Boot Commands
58 */
59#include <config_cmd_default.h>
60#define CONFIG_DISPLAY_CPUINFO
61#define CONFIG_DOS_PARTITION
62
63#define CONFIG_CMD_CACHE
64#define CONFIG_CMD_DATE
65#define CONFIG_CMD_DHCP
66#define CONFIG_CMD_EEPROM
67#define CONFIG_CMD_EXT2
68#define CONFIG_CMD_FAT
69#define CONFIG_CMD_GPIO
70#define CONFIG_CMD_I2C
71#define CONFIG_CMD_MII
72#define CONFIG_CMD_MMC
73#define CONFIG_CMD_NAND
74#define CONFIG_CMD_NET
75#define CONFIG_CMD_NFS
76#define CONFIG_CMD_PING
77#define CONFIG_CMD_SETEXPR
78#define CONFIG_CMD_SF
79#define CONFIG_CMD_SPI
Marek Vasut8f59bc12011-11-08 23:18:27 +000080#define CONFIG_CMD_USB
Marek Vasutfc102722011-11-08 23:18:20 +000081
82/*
83 * Memory configurations
84 */
Fabio Estevam0249e4b2011-11-10 06:38:45 +000085#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
Marek Vasutfc102722011-11-08 23:18:20 +000086#define PHYS_SDRAM_1 0x40000000 /* Base address */
Marek Vasut3a4ce832011-11-08 23:18:24 +000087#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
Marek Vasutfc102722011-11-08 23:18:20 +000088#define CONFIG_STACKSIZE 0x00010000 /* 128 KB stack */
89#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
90#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
91#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
92#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
93#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
94/* Point initial SP in SRAM so SPL can use it too. */
Fabio Estevam10846062011-12-29 03:35:38 +000095
96#define CONFIG_SYS_INIT_RAM_ADDR 0x00002000
97#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
98
99#define CONFIG_SYS_INIT_SP_OFFSET \
100 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
101#define CONFIG_SYS_INIT_SP_ADDR \
102 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
Marek Vasutfc102722011-11-08 23:18:20 +0000103/*
104 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
105 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
106 * binary. In case there was more of this mess, 0x100 bytes are skipped.
107 */
108#define CONFIG_SYS_TEXT_BASE 0x40000100
109
110/*
111 * U-Boot general configurations
112 */
113#define CONFIG_SYS_LONGHELP
114#define CONFIG_SYS_PROMPT "=> "
115#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
116#define CONFIG_SYS_PBSIZE \
117 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
118 /* Print buffer size */
119#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
120#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
121 /* Boot argument buffer size */
122#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
123#define CONFIG_AUTO_COMPLETE /* Command auto complete */
124#define CONFIG_CMDLINE_EDITING /* Command history etc */
125#define CONFIG_SYS_HUSH_PARSER
126#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
127
128/*
129 * Serial Driver
130 */
131#define CONFIG_PL011_SERIAL
132#define CONFIG_PL011_CLOCK 24000000
133#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
134#define CONFIG_CONS_INDEX 0
135#define CONFIG_BAUDRATE 115200 /* Default baud rate */
136#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
137
138/*
139 * MMC Driver
140 */
141#ifdef CONFIG_CMD_MMC
142#define CONFIG_MMC
143#define CONFIG_GENERIC_MMC
144#define CONFIG_MXS_MMC
145#endif
146
147/*
148 * NAND
149 */
Marek Vasutc660a542011-12-31 18:28:22 +0000150#define CONFIG_ENV_SIZE (16 * 1024)
Marek Vasutfc102722011-11-08 23:18:20 +0000151#ifdef CONFIG_CMD_NAND
152#define CONFIG_NAND_MXS
153#define CONFIG_APBH_DMA
154#define CONFIG_SYS_MAX_NAND_DEVICE 1
155#define CONFIG_SYS_NAND_BASE 0x60000000
156#define CONFIG_SYS_NAND_5_ADDR_CYCLE
Marek Vasutfc102722011-11-08 23:18:20 +0000157
158/* Environment is in NAND */
159#define CONFIG_ENV_IS_IN_NAND
Marek Vasutfc102722011-11-08 23:18:20 +0000160#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
161#define CONFIG_ENV_SECT_SIZE (128 * 1024)
162#define CONFIG_ENV_RANGE (512 * 1024)
163#define CONFIG_ENV_OFFSET 0x300000
164#define CONFIG_ENV_OFFSET_REDUND \
165 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
166
167#define CONFIG_CMD_UBI
168#define CONFIG_CMD_UBIFS
169#define CONFIG_CMD_MTDPARTS
170#define CONFIG_RBTREE
171#define CONFIG_LZO
172#define CONFIG_MTD_DEVICE
173#define CONFIG_MTD_PARTITIONS
174#define MTDIDS_DEFAULT "nand0=gpmi-nand.0"
175#define MTDPARTS_DEFAULT \
176 "mtdparts=gpmi-nand.0:" \
177 "3m(bootloader)ro," \
178 "512k(environment)," \
179 "512k(redundant-environment)," \
180 "4m(kernel)," \
181 "-(filesystem)"
Marek Vasutc660a542011-12-31 18:28:22 +0000182#else
183#define CONFIG_ENV_IS_NOWHERE
Marek Vasutfc102722011-11-08 23:18:20 +0000184#endif
185
186/*
187 * Ethernet on SOC (FEC)
188 */
189#ifdef CONFIG_CMD_NET
Marek Vasutfc102722011-11-08 23:18:20 +0000190#define CONFIG_ETHPRIME "FEC0"
191#define CONFIG_FEC_MXC
192#define CONFIG_FEC_MXC_MULTI
193#define CONFIG_MII
194#define CONFIG_DISCOVER_PHY
195#define CONFIG_FEC_XCV_TYPE RMII
196#endif
197
198/*
199 * I2C
200 */
201#ifdef CONFIG_CMD_I2C
202#define CONFIG_I2C_MXS
203#define CONFIG_HARD_I2C
204#define CONFIG_SYS_I2C_SPEED 400000
205#endif
206
207/*
208 * EEPROM
209 */
210#ifdef CONFIG_CMD_EEPROM
211#define CONFIG_SYS_I2C_MULTI_EEPROMS
212#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
213#endif
214
215/*
216 * RTC
217 */
218#ifdef CONFIG_CMD_DATE
219/* Use the internal RTC in the MXS chip */
220#define CONFIG_RTC_INTERNAL
221#ifdef CONFIG_RTC_INTERNAL
222#define CONFIG_RTC_MXS
223#else
224#define CONFIG_RTC_M41T62
225#define CONFIG_SYS_I2C_RTC_ADDR 0x68
226#define CONFIG_SYS_M41T11_BASE_YEAR 2000
227#endif
228#endif
229
230/*
Marek Vasut8f59bc12011-11-08 23:18:27 +0000231 * USB
232 */
233#ifdef CONFIG_CMD_USB
234#define CONFIG_USB_EHCI
235#define CONFIG_USB_EHCI_MXS
236#define CONFIG_EHCI_MXS_PORT 1
237#define CONFIG_EHCI_IS_TDI
238#define CONFIG_USB_STORAGE
239#endif
240
241/*
Marek Vasutfc102722011-11-08 23:18:20 +0000242 * SPI
243 */
244#ifdef CONFIG_CMD_SPI
245#define CONFIG_HARD_SPI
246#define CONFIG_MXS_SPI
247#define CONFIG_SPI_HALF_DUPLEX
248#define CONFIG_DEFAULT_SPI_BUS 2
249#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
250
251/* SPI FLASH */
252#ifdef CONFIG_CMD_SF
253#define CONFIG_SPI_FLASH
254#define CONFIG_SPI_FLASH_STMICRO
255#define CONFIG_SPI_FLASH_CS 2
256#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
257#define CONFIG_SF_DEFAULT_SPEED 24000000
258
259#define CONFIG_ENV_SPI_CS 0
260#define CONFIG_ENV_SPI_BUS 2
261#define CONFIG_ENV_SPI_MAX_HZ 24000000
262#define CONFIG_ENV_SPI_MODE SPI_MODE_0
263#endif
264#endif
265
266/*
267 * Boot Linux
268 */
269#define CONFIG_CMDLINE_TAG
270#define CONFIG_SETUP_MEMORY_TAGS
271#define CONFIG_BOOTDELAY 3
272#define CONFIG_BOOTFILE "uImage"
273#define CONFIG_BOOTARGS "console=ttyAM0,115200n8 "
274#define CONFIG_BOOTCOMMAND "run bootcmd_net"
275#define CONFIG_LOADADDR 0x42000000
276#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
277
278/*
279 * Extra Environments
280 */
281#define CONFIG_EXTRA_ENV_SETTINGS \
282 "update_nand_full_filename=u-boot.nand\0" \
283 "update_nand_firmware_filename=u-boot.sb\0" \
284 "update_nand_firmware_maxsz=0x100000\0" \
285 "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \
286 "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \
287 "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \
288 "nand device 0 ; " \
289 "nand info ; " \
290 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
291 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
292 "update_nand_full=" /* Update FCB, DBBT and FW */ \
293 "if tftp ${update_nand_full_filename} ; then " \
294 "run update_nand_get_fcb_size ; " \
295 "nand scrub -y 0x0 ${filesize} ; " \
296 "nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; " \
297 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
298 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
299 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
300 "fi\0" \
301 "update_nand_firmware=" /* Update only firmware */ \
302 "if tftp ${update_nand_firmware_filename} ; then " \
303 "run update_nand_get_fcb_size ; " \
304 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
305 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
306 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
307 "nand erase ${fcb_sz} ${fw_sz} ; " \
308 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \
309 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \
310 "fi\0"
311
312#endif /* __M28_H__ */