blob: fe93ff3d3397b49f9ba03e21e1c08e04527970a3 [file] [log] [blame]
Sebastian Reichel43fdd31c2024-10-15 17:26:44 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2016-2017 Google, Inc
4 *
5 * Fairchild FUSB302 Type-C Chip Driver
6 */
7
8#include <dm.h>
9#include <i2c.h>
10#include <asm/gpio.h>
11#include <linux/delay.h>
12#include <linux/err.h>
13#include <dm/device_compat.h>
14#include <usb/tcpm.h>
15#include "fusb302_reg.h"
16
17#define FUSB302_MAX_MSG_LEN 0x1F
18
19enum toggling_mode {
20 TOGGLING_MODE_OFF,
21 TOGGLING_MODE_DRP,
22 TOGGLING_MODE_SNK,
23 TOGGLING_MODE_SRC,
24};
25
26enum src_current_status {
27 SRC_CURRENT_DEFAULT,
28 SRC_CURRENT_MEDIUM,
29 SRC_CURRENT_HIGH,
30};
31
32static const u8 ra_mda_value[] = {
33 [SRC_CURRENT_DEFAULT] = 4, /* 210mV */
34 [SRC_CURRENT_MEDIUM] = 9, /* 420mV */
35 [SRC_CURRENT_HIGH] = 18, /* 798mV */
36};
37
38static const u8 rd_mda_value[] = {
39 [SRC_CURRENT_DEFAULT] = 38, /* 1638mV */
40 [SRC_CURRENT_MEDIUM] = 38, /* 1638mV */
41 [SRC_CURRENT_HIGH] = 61, /* 2604mV */
42};
43
44struct fusb302_chip {
45 enum toggling_mode toggling_mode;
46 enum src_current_status src_current_status;
47 bool intr_togdone;
48 bool intr_bc_lvl;
49 bool intr_comp_chng;
50
51 /* port status */
52 bool vconn_on;
53 bool vbus_present;
54 enum typec_cc_polarity cc_polarity;
55 enum typec_cc_status cc1;
56 enum typec_cc_status cc2;
57};
58
59static int fusb302_i2c_write(struct udevice *dev, u8 address, u8 data)
60{
61 int ret;
62
63 ret = dm_i2c_write(dev, address, &data, 1);
64 if (ret)
65 dev_err(dev, "cannot write 0x%02x to 0x%02x, ret=%d\n",
66 data, address, ret);
67
68 return ret;
69}
70
71static int fusb302_i2c_block_write(struct udevice *dev, u8 address,
72 u8 length, const u8 *data)
73{
74 int ret;
75
76 if (!length)
77 return 0;
78
79 ret = dm_i2c_write(dev, address, data, length);
80 if (ret)
81 dev_err(dev, "cannot block write 0x%02x, len=%d, ret=%d\n",
82 address, length, ret);
83
84 return ret;
85}
86
87static int fusb302_i2c_read(struct udevice *dev, u8 address, u8 *data)
88{
89 int ret, retries;
90
91 for (retries = 0; retries < 3; retries++) {
92 ret = dm_i2c_read(dev, address, data, 1);
93 if (ret == 0)
94 return ret;
95 dev_err(dev, "cannot read %02x, ret=%d\n", address, ret);
96 }
97
98 return ret;
99}
100
101static int fusb302_i2c_block_read(struct udevice *dev, u8 address,
102 u8 length, u8 *data)
103{
104 int ret;
105
106 if (!length)
107 return 0;
108
109 ret = dm_i2c_read(dev, address, data, length);
110 if (ret)
111 dev_err(dev, "cannot block read 0x%02x, len=%d, ret=%d\n",
112 address, length, ret);
113 return ret;
114}
115
116static int fusb302_i2c_mask_write(struct udevice *dev, u8 address,
117 u8 mask, u8 value)
118{
119 int ret;
120 u8 data;
121
122 ret = fusb302_i2c_read(dev, address, &data);
123 if (ret)
124 return ret;
125 data &= ~mask;
126 data |= value;
127 ret = fusb302_i2c_write(dev, address, data);
128 if (ret)
129 return ret;
130
131 return ret;
132}
133
134static int fusb302_i2c_set_bits(struct udevice *dev, u8 address, u8 set_bits)
135{
136 return fusb302_i2c_mask_write(dev, address, 0x00, set_bits);
137}
138
139static int fusb302_i2c_clear_bits(struct udevice *dev, u8 address, u8 clear_bits)
140{
141 return fusb302_i2c_mask_write(dev, address, clear_bits, 0x00);
142}
143
144static int fusb302_sw_reset(struct udevice *dev)
145{
146 int ret = fusb302_i2c_write(dev, FUSB_REG_RESET, FUSB_REG_RESET_SW_RESET);
147
148 if (ret)
149 dev_err(dev, "cannot sw reset the fusb302: %d\n", ret);
150
151 return ret;
152}
153
154static int fusb302_enable_tx_auto_retries(struct udevice *dev, u8 retry_count)
155{
156 int ret;
157
158 ret = fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL3, retry_count |
159 FUSB_REG_CONTROL3_AUTO_RETRY);
160
161 return ret;
162}
163
164/*
165 * mask all interrupt on the chip
166 */
167static int fusb302_mask_interrupt(struct udevice *dev)
168{
169 int ret;
170
171 ret = fusb302_i2c_write(dev, FUSB_REG_MASK, 0xFF);
172 if (ret)
173 return ret;
174 ret = fusb302_i2c_write(dev, FUSB_REG_MASKA, 0xFF);
175 if (ret)
176 return ret;
177 ret = fusb302_i2c_write(dev, FUSB_REG_MASKB, 0xFF);
178 if (ret)
179 return ret;
180 ret = fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL0,
181 FUSB_REG_CONTROL0_INT_MASK);
182 return ret;
183}
184
185/*
186 * initialize interrupt on the chip
187 * - unmasked interrupt: VBUS_OK
188 */
189static int fusb302_init_interrupt(struct udevice *dev)
190{
191 int ret;
192
193 ret = fusb302_i2c_write(dev, FUSB_REG_MASK,
194 0xFF & ~FUSB_REG_MASK_VBUSOK);
195 if (ret)
196 return ret;
197 ret = fusb302_i2c_write(dev, FUSB_REG_MASKA, 0xFF);
198 if (ret)
199 return ret;
200 ret = fusb302_i2c_write(dev, FUSB_REG_MASKB, 0xFF);
201 if (ret)
202 return ret;
203 ret = fusb302_i2c_clear_bits(dev, FUSB_REG_CONTROL0,
204 FUSB_REG_CONTROL0_INT_MASK);
205 return ret;
206}
207
208static int fusb302_set_power_mode(struct udevice *dev, u8 power_mode)
209{
210 int ret;
211
212 ret = fusb302_i2c_write(dev, FUSB_REG_POWER, power_mode);
213
214 return ret;
215}
216
217static int fusb302_init(struct udevice *dev)
218{
219 struct fusb302_chip *chip = dev_get_priv(dev);
220 int ret;
221 u8 data;
222
223 ret = fusb302_sw_reset(dev);
224 if (ret)
225 return ret;
226 ret = fusb302_enable_tx_auto_retries(dev, FUSB_REG_CONTROL3_N_RETRIES_3);
227 if (ret)
228 return ret;
229 ret = fusb302_init_interrupt(dev);
230 if (ret)
231 return ret;
232 ret = fusb302_set_power_mode(dev, FUSB_REG_POWER_PWR_ALL);
233 if (ret)
234 return ret;
235 ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &data);
236 if (ret)
237 return ret;
238 chip->vbus_present = !!(data & FUSB_REG_STATUS0_VBUSOK);
239 ret = fusb302_i2c_read(dev, FUSB_REG_DEVICE_ID, &data);
240 if (ret)
241 return ret;
242 dev_info(dev, "fusb302 device ID: 0x%02x\n", data);
243
244 return ret;
245}
246
247static int fusb302_get_vbus(struct udevice *dev)
248{
249 struct fusb302_chip *chip = dev_get_priv(dev);
250
251 return chip->vbus_present ? 1 : 0;
252}
253
254static int fusb302_set_src_current(struct udevice *dev,
255 enum src_current_status status)
256{
257 struct fusb302_chip *chip = dev_get_priv(dev);
258 int ret;
259
260 chip->src_current_status = status;
261 switch (status) {
262 case SRC_CURRENT_DEFAULT:
263 ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL0,
264 FUSB_REG_CONTROL0_HOST_CUR_MASK,
265 FUSB_REG_CONTROL0_HOST_CUR_DEF);
266 break;
267 case SRC_CURRENT_MEDIUM:
268 ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL0,
269 FUSB_REG_CONTROL0_HOST_CUR_MASK,
270 FUSB_REG_CONTROL0_HOST_CUR_MED);
271 break;
272 case SRC_CURRENT_HIGH:
273 ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL0,
274 FUSB_REG_CONTROL0_HOST_CUR_MASK,
275 FUSB_REG_CONTROL0_HOST_CUR_HIGH);
276 break;
277 default:
278 ret = -EINVAL;
279 break;
280 }
281
282 return ret;
283}
284
285static int fusb302_set_toggling(struct udevice *dev,
286 enum toggling_mode mode)
287{
288 struct fusb302_chip *chip = dev_get_priv(dev);
289 int ret;
290
291 /* first disable toggling */
292 ret = fusb302_i2c_clear_bits(dev, FUSB_REG_CONTROL2,
293 FUSB_REG_CONTROL2_TOGGLE);
294 if (ret)
295 return ret;
296 /* mask interrupts for SRC or SNK */
297 ret = fusb302_i2c_set_bits(dev, FUSB_REG_MASK,
298 FUSB_REG_MASK_BC_LVL |
299 FUSB_REG_MASK_COMP_CHNG);
300 if (ret)
301 return ret;
302 chip->intr_bc_lvl = false;
303 chip->intr_comp_chng = false;
304 /* configure toggling mode: none/snk/src/drp */
305 switch (mode) {
306 case TOGGLING_MODE_OFF:
307 ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2,
308 FUSB_REG_CONTROL2_MODE_MASK,
309 FUSB_REG_CONTROL2_MODE_NONE);
310 break;
311 case TOGGLING_MODE_SNK:
312 ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2,
313 FUSB_REG_CONTROL2_MODE_MASK,
314 FUSB_REG_CONTROL2_MODE_UFP);
315 break;
316 case TOGGLING_MODE_SRC:
317 ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2,
318 FUSB_REG_CONTROL2_MODE_MASK,
319 FUSB_REG_CONTROL2_MODE_DFP);
320 break;
321 case TOGGLING_MODE_DRP:
322 ret = fusb302_i2c_mask_write(dev, FUSB_REG_CONTROL2,
323 FUSB_REG_CONTROL2_MODE_MASK,
324 FUSB_REG_CONTROL2_MODE_DRP);
325 break;
326 default:
327 break;
328 }
329
330 if (ret)
331 return ret;
332
333 if (mode == TOGGLING_MODE_OFF) {
334 /* mask TOGDONE interrupt */
335 ret = fusb302_i2c_set_bits(dev, FUSB_REG_MASKA,
336 FUSB_REG_MASKA_TOGDONE);
337 if (ret)
338 return ret;
339 chip->intr_togdone = false;
340 } else {
341 /* Datasheet says vconn MUST be off when toggling */
342 if (chip->vconn_on)
343 dev_warn(dev, "Vconn is on during toggle start\n");
344 /* unmask TOGDONE interrupt */
345 ret = fusb302_i2c_clear_bits(dev, FUSB_REG_MASKA,
346 FUSB_REG_MASKA_TOGDONE);
347 if (ret)
348 return ret;
349 chip->intr_togdone = true;
350 /* start toggling */
351 ret = fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL2,
352 FUSB_REG_CONTROL2_TOGGLE);
353 if (ret)
354 return ret;
355 /* during toggling, consider cc as Open */
356 chip->cc1 = TYPEC_CC_OPEN;
357 chip->cc2 = TYPEC_CC_OPEN;
358 }
359 chip->toggling_mode = mode;
360
361 return ret;
362}
363
364static const enum src_current_status cc_src_current[] = {
365 [TYPEC_CC_OPEN] = SRC_CURRENT_DEFAULT,
366 [TYPEC_CC_RA] = SRC_CURRENT_DEFAULT,
367 [TYPEC_CC_RD] = SRC_CURRENT_DEFAULT,
368 [TYPEC_CC_RP_DEF] = SRC_CURRENT_DEFAULT,
369 [TYPEC_CC_RP_1_5] = SRC_CURRENT_MEDIUM,
370 [TYPEC_CC_RP_3_0] = SRC_CURRENT_HIGH,
371};
372
373static int fusb302_set_cc(struct udevice *dev, enum typec_cc_status cc)
374{
375 struct fusb302_chip *chip = dev_get_priv(dev);
376 const u8 switches0_mask = FUSB_REG_SWITCHES0_CC1_PU_EN |
377 FUSB_REG_SWITCHES0_CC2_PU_EN |
378 FUSB_REG_SWITCHES0_CC1_PD_EN |
379 FUSB_REG_SWITCHES0_CC2_PD_EN;
380 u8 rd_mda, switches0_data = 0x00;
381 int ret;
382
383 switch (cc) {
384 case TYPEC_CC_OPEN:
385 break;
386 case TYPEC_CC_RD:
387 switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN |
388 FUSB_REG_SWITCHES0_CC2_PD_EN;
389 break;
390 case TYPEC_CC_RP_DEF:
391 case TYPEC_CC_RP_1_5:
392 case TYPEC_CC_RP_3_0:
393 switches0_data |= (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
394 FUSB_REG_SWITCHES0_CC1_PU_EN :
395 FUSB_REG_SWITCHES0_CC2_PU_EN;
396 break;
397 default:
398 dev_err(dev, "unsupported CC value: %s\n",
399 typec_cc_status_name[cc]);
400 ret = -EINVAL;
401 goto done;
402 }
403
404 ret = fusb302_set_toggling(dev, TOGGLING_MODE_OFF);
405 if (ret) {
406 dev_err(dev, "cannot set toggling mode: %d\n", ret);
407 goto done;
408 }
409
410 ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES0,
411 switches0_mask, switches0_data);
412 if (ret) {
413 dev_err(dev, "cannot set pull-up/-down: %d\n", ret);
414 goto done;
415 }
416 /* reset the cc status */
417 chip->cc1 = TYPEC_CC_OPEN;
418 chip->cc2 = TYPEC_CC_OPEN;
419
420 /* adjust current for SRC */
421 ret = fusb302_set_src_current(dev, cc_src_current[cc]);
422 if (ret) {
423 dev_err(dev, "cannot set src current %s: %d\n",
424 typec_cc_status_name[cc], ret);
425 goto done;
426 }
427
428 /* enable/disable interrupts, BC_LVL for SNK and COMP_CHNG for SRC */
429 switch (cc) {
430 case TYPEC_CC_RP_DEF:
431 case TYPEC_CC_RP_1_5:
432 case TYPEC_CC_RP_3_0:
433 rd_mda = rd_mda_value[cc_src_current[cc]];
434 ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, rd_mda);
435 if (ret) {
436 dev_err(dev, "cannot set SRC measure value: %d\n", ret);
437 goto done;
438 }
439 ret = fusb302_i2c_mask_write(dev, FUSB_REG_MASK,
440 FUSB_REG_MASK_BC_LVL |
441 FUSB_REG_MASK_COMP_CHNG,
442 FUSB_REG_MASK_BC_LVL);
443 if (ret) {
444 dev_err(dev, "cannot set SRC irq: %d\n", ret);
445 goto done;
446 }
447 chip->intr_comp_chng = true;
448 break;
449 case TYPEC_CC_RD:
450 ret = fusb302_i2c_mask_write(dev, FUSB_REG_MASK,
451 FUSB_REG_MASK_BC_LVL |
452 FUSB_REG_MASK_COMP_CHNG,
453 FUSB_REG_MASK_COMP_CHNG);
454 if (ret) {
455 dev_err(dev, "cannot set SRC irq: %d\n", ret);
456 goto done;
457 }
458 chip->intr_bc_lvl = true;
459 break;
460 default:
461 break;
462 }
463done:
464 return ret;
465}
466
467static int fusb302_get_cc(struct udevice *dev, enum typec_cc_status *cc1,
468 enum typec_cc_status *cc2)
469{
470 struct fusb302_chip *chip = dev_get_priv(dev);
471
472 *cc1 = chip->cc1;
473 *cc2 = chip->cc2;
474 dev_dbg(dev, "get cc1 = %s, cc2 = %s\n", typec_cc_status_name[*cc1],
475 typec_cc_status_name[*cc2]);
476
477 return 0;
478}
479
480static int fusb302_set_vconn(struct udevice *dev, bool on)
481{
482 struct fusb302_chip *chip = dev_get_priv(dev);
483 int ret;
484 u8 switches0_data = 0x00;
485 u8 switches0_mask = FUSB_REG_SWITCHES0_VCONN_CC1 |
486 FUSB_REG_SWITCHES0_VCONN_CC2;
487
488 if (chip->vconn_on == on) {
489 ret = 0;
490 dev_dbg(dev, "vconn is already %s\n", on ? "on" : "off");
491 goto done;
492 }
493 if (on) {
494 switches0_data = (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
495 FUSB_REG_SWITCHES0_VCONN_CC2 :
496 FUSB_REG_SWITCHES0_VCONN_CC1;
497 }
498 ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES0,
499 switches0_mask, switches0_data);
500 if (ret)
501 goto done;
502 dev_dbg(dev, "set vconn = %s\n", on ? "on" : "off");
503done:
504 return ret;
505}
506
507static int fusb302_set_vbus(struct udevice *dev, bool on, bool charge)
508{
509 return 0;
510}
511
512static int fusb302_pd_tx_flush(struct udevice *dev)
513{
514 return fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL0,
515 FUSB_REG_CONTROL0_TX_FLUSH);
516}
517
518static int fusb302_pd_rx_flush(struct udevice *dev)
519{
520 return fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL1,
521 FUSB_REG_CONTROL1_RX_FLUSH);
522}
523
524static int fusb302_pd_set_auto_goodcrc(struct udevice *dev, bool on)
525{
526 if (on)
527 return fusb302_i2c_set_bits(dev, FUSB_REG_SWITCHES1,
528 FUSB_REG_SWITCHES1_AUTO_GCRC);
529 return fusb302_i2c_clear_bits(dev, FUSB_REG_SWITCHES1,
530 FUSB_REG_SWITCHES1_AUTO_GCRC);
531}
532
533static int fusb302_pd_set_interrupts(struct udevice *dev, bool on)
534{
535 int ret;
536 u8 mask_interrupts = FUSB_REG_MASK_COLLISION;
537 u8 maska_interrupts = FUSB_REG_MASKA_RETRYFAIL |
538 FUSB_REG_MASKA_HARDSENT |
539 FUSB_REG_MASKA_TX_SUCCESS |
540 FUSB_REG_MASKA_HARDRESET;
541 u8 maskb_interrupts = FUSB_REG_MASKB_GCRCSENT;
542
543 ret = on ?
544 fusb302_i2c_clear_bits(dev, FUSB_REG_MASK, mask_interrupts) :
545 fusb302_i2c_set_bits(dev, FUSB_REG_MASK, mask_interrupts);
546 if (ret)
547 return ret;
548 ret = on ?
549 fusb302_i2c_clear_bits(dev, FUSB_REG_MASKA, maska_interrupts) :
550 fusb302_i2c_set_bits(dev, FUSB_REG_MASKA, maska_interrupts);
551 if (ret)
552 return ret;
553 ret = on ?
554 fusb302_i2c_clear_bits(dev, FUSB_REG_MASKB, maskb_interrupts) :
555 fusb302_i2c_set_bits(dev, FUSB_REG_MASKB, maskb_interrupts);
556 return ret;
557}
558
559static int fusb302_set_pd_rx(struct udevice *dev, bool on)
560{
561 int ret;
562
563 ret = fusb302_pd_rx_flush(dev);
564 if (ret) {
565 dev_err(dev, "cannot flush pd rx buffer: %d\n", ret);
566 goto done;
567 }
568 ret = fusb302_pd_tx_flush(dev);
569 if (ret) {
570 dev_err(dev, "cannot flush pd tx buffer: %d\n", ret);
571 goto done;
572 }
573 ret = fusb302_pd_set_auto_goodcrc(dev, on);
574 if (ret) {
575 dev_err(dev, "cannot turn %s auto GoodCRC: %d\n",
576 on ? "on" : "off", ret);
577 goto done;
578 }
579 ret = fusb302_pd_set_interrupts(dev, on);
580 if (ret) {
581 dev_err(dev, "cannot turn %s pd interrupts: %d\n",
582 on ? "on" : "off", ret);
583 goto done;
584 }
585 dev_dbg(dev, "set pd RX %s\n", on ? "on" : "off");
586done:
587 return ret;
588}
589
590static int fusb302_set_roles(struct udevice *dev, bool attached,
591 enum typec_role pwr, enum typec_data_role data)
592{
593 int ret;
594 u8 switches1_mask = FUSB_REG_SWITCHES1_POWERROLE |
595 FUSB_REG_SWITCHES1_DATAROLE;
596 u8 switches1_data = 0x00;
597
598 if (pwr == TYPEC_SOURCE)
599 switches1_data |= FUSB_REG_SWITCHES1_POWERROLE;
600 if (data == TYPEC_HOST)
601 switches1_data |= FUSB_REG_SWITCHES1_DATAROLE;
602 ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES1,
603 switches1_mask, switches1_data);
604 if (ret) {
605 dev_err(dev, "unable to set pd header %s, %s, ret=%d\n",
606 typec_role_name[pwr], typec_data_role_name[data], ret);
607 goto done;
608 }
609 dev_dbg(dev, "pd header : %s, %s\n", typec_role_name[pwr],
610 typec_data_role_name[data]);
611done:
612
613 return ret;
614}
615
616static int fusb302_start_toggling(struct udevice *dev,
617 enum typec_port_type port_type,
618 enum typec_cc_status cc)
619{
620 enum toggling_mode mode = TOGGLING_MODE_OFF;
621 int ret;
622
623 switch (port_type) {
624 case TYPEC_PORT_SRC:
625 mode = TOGGLING_MODE_SRC;
626 break;
627 case TYPEC_PORT_SNK:
628 mode = TOGGLING_MODE_SNK;
629 break;
630 case TYPEC_PORT_DRP:
631 mode = TOGGLING_MODE_DRP;
632 break;
633 }
634
635 ret = fusb302_set_src_current(dev, cc_src_current[cc]);
636 if (ret) {
637 dev_err(dev, "unable to set src current %s, ret=%d",
638 typec_cc_status_name[cc], ret);
639 goto done;
640 }
641 ret = fusb302_set_toggling(dev, mode);
642 if (ret) {
643 dev_err(dev, "unable to start drp toggling: %d\n", ret);
644 goto done;
645 }
646 dev_info(dev, "fusb302 start drp toggling\n");
647done:
648
649 return ret;
650}
651
652static int fusb302_pd_send_message(struct udevice *dev,
653 const struct pd_message *msg)
654{
655 int ret;
656 /* SOP tokens */
657 u8 buf[40] = {FUSB302_TKN_SYNC1, FUSB302_TKN_SYNC1, FUSB302_TKN_SYNC1,
658 FUSB302_TKN_SYNC2};
659 u8 pos = 4;
660 int len;
661
662 len = pd_header_cnt_le(msg->header) * 4;
663 /* plug 2 for header */
664 len += 2;
665 if (len > FUSB302_MAX_MSG_LEN) {
666 dev_err(dev, "PD message too long %d (incl. header)", len);
667 return -EINVAL;
668 }
669 /* packsym tells the FUSB302 chip that the next X bytes are payload */
670 buf[pos++] = FUSB302_TKN_PACKSYM | (len & FUSB302_MAX_MSG_LEN);
671 memcpy(&buf[pos], &msg->header, sizeof(msg->header));
672 pos += sizeof(msg->header);
673
674 len -= 2;
675 memcpy(&buf[pos], msg->payload, len);
676 pos += len;
677
678 /* CRC */
679 buf[pos++] = FUSB302_TKN_JAMCRC;
680 /* EOP */
681 buf[pos++] = FUSB302_TKN_EOP;
682 /* turn tx off after sending message */
683 buf[pos++] = FUSB302_TKN_TXOFF;
684 /* start transmission */
685 buf[pos++] = FUSB302_TKN_TXON;
686
687 ret = fusb302_i2c_block_write(dev, FUSB_REG_FIFOS, pos, buf);
688 if (ret)
689 return ret;
690 dev_dbg(dev, "Send PD message (header=0x%x len=%d)\n", msg->header, len);
691
692 return ret;
693}
694
695static int fusb302_pd_send_hardreset(struct udevice *dev)
696{
697 return fusb302_i2c_set_bits(dev, FUSB_REG_CONTROL3,
698 FUSB_REG_CONTROL3_SEND_HARDRESET);
699}
700
701static const char * const transmit_type_name[] = {
702 [TCPC_TX_SOP] = "SOP",
703 [TCPC_TX_SOP_PRIME] = "SOP'",
704 [TCPC_TX_SOP_PRIME_PRIME] = "SOP''",
705 [TCPC_TX_SOP_DEBUG_PRIME] = "DEBUG'",
706 [TCPC_TX_SOP_DEBUG_PRIME_PRIME] = "DEBUG''",
707 [TCPC_TX_HARD_RESET] = "HARD_RESET",
708 [TCPC_TX_CABLE_RESET] = "CABLE_RESET",
709 [TCPC_TX_BIST_MODE_2] = "BIST_MODE_2",
710};
711
712static int fusb302_pd_transmit(struct udevice *dev, enum tcpm_transmit_type type,
713 const struct pd_message *msg, unsigned int negotiated_rev)
714{
715 int ret;
716
717 switch (type) {
718 case TCPC_TX_SOP:
719 /* nRetryCount 3 in P2.0 spec, whereas 2 in PD3.0 spec */
720 ret = fusb302_enable_tx_auto_retries(dev, negotiated_rev > PD_REV20 ?
721 FUSB_REG_CONTROL3_N_RETRIES_2 :
722 FUSB_REG_CONTROL3_N_RETRIES_3);
723 if (ret)
724 dev_err(dev, "cannot update retry count: %d\n", ret);
725
726 ret = fusb302_pd_send_message(dev, msg);
727 if (ret)
728 dev_err(dev, "cannot send PD message: %d\n", ret);
729 break;
730 case TCPC_TX_HARD_RESET:
731 ret = fusb302_pd_send_hardreset(dev);
732 if (ret)
733 dev_err(dev, "cannot send hardreset: %d\n", ret);
734 break;
735 default:
736 dev_err(dev, "type %s not supported", transmit_type_name[type]);
737 ret = -EINVAL;
738 }
739
740 return ret;
741}
742
743static enum typec_cc_status fusb302_bc_lvl_to_cc(u8 bc_lvl)
744{
745 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_1230_MAX)
746 return TYPEC_CC_RP_3_0;
747 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_600_1230)
748 return TYPEC_CC_RP_1_5;
749 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_200_600)
750 return TYPEC_CC_RP_DEF;
751 return TYPEC_CC_OPEN;
752}
753
754static void fusb302_bc_lvl_handler(struct udevice *dev)
755{
756 struct fusb302_chip *chip = dev_get_priv(dev);
757 enum typec_cc_status cc_status;
758 u8 status0, bc_lvl;
759 int ret;
760
761 if (!chip->intr_bc_lvl) {
762 dev_err(dev, "BC_LVL interrupt is turned off, abort\n");
763 goto done;
764 }
765 ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0);
766 if (ret)
767 goto done;
768
769 dev_dbg(dev, "BC_LVL handler, status0 = 0x%02x\n", status0);
770 if (status0 & FUSB_REG_STATUS0_ACTIVITY)
771 dev_info(dev, "CC activities detected, delay handling\n");
772 bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
773 cc_status = fusb302_bc_lvl_to_cc(bc_lvl);
774 if (chip->cc_polarity == TYPEC_POLARITY_CC1) {
775 if (chip->cc1 != cc_status) {
776 dev_dbg(dev, "cc1: %s -> %s\n",
777 typec_cc_status_name[chip->cc1],
778 typec_cc_status_name[cc_status]);
779 chip->cc1 = cc_status;
780 tcpm_cc_change(dev);
781 }
782 } else {
783 if (chip->cc2 != cc_status) {
784 dev_dbg(dev, "cc2: %s -> %s\n",
785 typec_cc_status_name[chip->cc2],
786 typec_cc_status_name[cc_status]);
787 chip->cc2 = cc_status;
788 tcpm_cc_change(dev);
789 }
790 }
791
792done:
793 return;
794}
795
796static int fusb302_enter_low_power_mode(struct udevice *dev,
797 bool attached, bool pd_capable)
798{
799 unsigned int reg;
800 int ret;
801
802 ret = fusb302_mask_interrupt(dev);
803 if (ret)
804 return ret;
805 if (attached && pd_capable)
806 reg = FUSB_REG_POWER_PWR_MEDIUM;
807 else if (attached)
808 reg = FUSB_REG_POWER_PWR_LOW;
809 else
810 reg = 0;
811
812 return fusb302_set_power_mode(dev, reg);
813}
814
815static const char * const cc_polarity_name[] = {
816 [TYPEC_POLARITY_CC1] = "Polarity_CC1",
817 [TYPEC_POLARITY_CC2] = "Polarity_CC2",
818};
819
820static int fusb302_set_cc_polarity_and_pull(struct udevice *dev,
821 enum typec_cc_polarity cc_polarity,
822 bool pull_up, bool pull_down)
823{
824 struct fusb302_chip *chip = dev_get_priv(dev);
825 int ret;
826 u8 switches0_data = 0x00;
827 u8 switches1_mask = FUSB_REG_SWITCHES1_TXCC1_EN |
828 FUSB_REG_SWITCHES1_TXCC2_EN;
829 u8 switches1_data = 0x00;
830
831 if (pull_down)
832 switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN |
833 FUSB_REG_SWITCHES0_CC2_PD_EN;
834
835 if (cc_polarity == TYPEC_POLARITY_CC1) {
836 switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC1;
837 if (chip->vconn_on)
838 switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC2;
839 if (pull_up)
840 switches0_data |= FUSB_REG_SWITCHES0_CC1_PU_EN;
841 switches1_data = FUSB_REG_SWITCHES1_TXCC1_EN;
842 } else {
843 switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC2;
844 if (chip->vconn_on)
845 switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC1;
846 if (pull_up)
847 switches0_data |= FUSB_REG_SWITCHES0_CC2_PU_EN;
848 switches1_data = FUSB_REG_SWITCHES1_TXCC2_EN;
849 }
850 ret = fusb302_i2c_write(dev, FUSB_REG_SWITCHES0, switches0_data);
851 if (ret)
852 return ret;
853 ret = fusb302_i2c_mask_write(dev, FUSB_REG_SWITCHES1,
854 switches1_mask, switches1_data);
855 if (ret)
856 return ret;
857 chip->cc_polarity = cc_polarity;
858
859 return ret;
860}
861
862static int fusb302_handle_togdone_snk(struct udevice *dev,
863 u8 togdone_result)
864{
865 struct fusb302_chip *chip = dev_get_priv(dev);
866 int ret;
867 u8 status0;
868 u8 bc_lvl;
869 enum typec_cc_polarity cc_polarity;
870 enum typec_cc_status cc_status_active, cc1, cc2;
871
872 /* set polarity and pull_up, pull_down */
873 cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SNK1) ?
874 TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2;
875 ret = fusb302_set_cc_polarity_and_pull(dev, cc_polarity, false, true);
876 if (ret) {
877 dev_err(dev, "cannot set cc polarity %s, ret = %d\n",
878 cc_polarity_name[cc_polarity], ret);
879 return ret;
880 }
881 /* fusb302_set_cc_polarity() has set the correct measure block */
882 ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0);
883 if (ret < 0)
884 return ret;
885 bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
886 cc_status_active = fusb302_bc_lvl_to_cc(bc_lvl);
887 /* restart toggling if the cc status on the active line is OPEN */
888 if (cc_status_active == TYPEC_CC_OPEN) {
889 dev_info(dev, "restart toggling as CC_OPEN detected\n");
890 ret = fusb302_set_toggling(dev, chip->toggling_mode);
891 return ret;
892 }
893 /* update tcpm with the new cc value */
894 cc1 = (cc_polarity == TYPEC_POLARITY_CC1) ?
895 cc_status_active : TYPEC_CC_OPEN;
896 cc2 = (cc_polarity == TYPEC_POLARITY_CC2) ?
897 cc_status_active : TYPEC_CC_OPEN;
898 if (chip->cc1 != cc1 || chip->cc2 != cc2) {
899 chip->cc1 = cc1;
900 chip->cc2 = cc2;
901 tcpm_cc_change(dev);
902 }
903 /* turn off toggling */
904 ret = fusb302_set_toggling(dev, TOGGLING_MODE_OFF);
905 if (ret) {
906 dev_err(dev, "cannot set toggling mode off, ret=%d\n", ret);
907 return ret;
908 }
909 /* unmask bc_lvl interrupt */
910 ret = fusb302_i2c_clear_bits(dev, FUSB_REG_MASK, FUSB_REG_MASK_BC_LVL);
911 if (ret) {
912 dev_err(dev, "cannot unmask bc_lcl irq, ret=%d\n", ret);
913 return ret;
914 }
915 chip->intr_bc_lvl = true;
916 dev_dbg(dev, "detected cc1=%s, cc2=%s\n",
917 typec_cc_status_name[cc1],
918 typec_cc_status_name[cc2]);
919
920 return ret;
921}
922
923/* On error returns < 0, otherwise a typec_cc_status value */
924static int fusb302_get_src_cc_status(struct udevice *dev,
925 enum typec_cc_polarity cc_polarity,
926 enum typec_cc_status *cc)
927{
928 struct fusb302_chip *chip = dev_get_priv(dev);
929 u8 ra_mda = ra_mda_value[chip->src_current_status];
930 u8 rd_mda = rd_mda_value[chip->src_current_status];
931 u8 switches0_data, status0;
932 int ret;
933
934 /* Step 1: Set switches so that we measure the right CC pin */
935 switches0_data = (cc_polarity == TYPEC_POLARITY_CC1) ?
936 FUSB_REG_SWITCHES0_CC1_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC1 :
937 FUSB_REG_SWITCHES0_CC2_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC2;
938 ret = fusb302_i2c_write(dev, FUSB_REG_SWITCHES0, switches0_data);
939 if (ret < 0)
940 return ret;
941
942 fusb302_i2c_read(dev, FUSB_REG_SWITCHES0, &status0);
943 dev_dbg(dev, "get_src_cc_status switches: 0x%0x", status0);
944
945 /* Step 2: Set compararator volt to differentiate between Open and Rd */
946 ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, rd_mda);
947 if (ret)
948 return ret;
949
950 udelay(100);
951 ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0);
952 if (ret)
953 return ret;
954
955 dev_dbg(dev, "get_src_cc_status rd_mda status0: 0x%0x", status0);
956 if (status0 & FUSB_REG_STATUS0_COMP) {
957 *cc = TYPEC_CC_OPEN;
958 return 0;
959 }
960
961 /* Step 3: Set compararator input to differentiate between Rd and Ra. */
962 ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, ra_mda);
963 if (ret)
964 return ret;
965
966 udelay(100);
967 ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0);
968 if (ret)
969 return ret;
970
971 dev_dbg(dev, "get_src_cc_status ra_mda status0: 0x%0x", status0);
972 if (status0 & FUSB_REG_STATUS0_COMP)
973 *cc = TYPEC_CC_RD;
974 else
975 *cc = TYPEC_CC_RA;
976
977 return 0;
978}
979
980static int fusb302_handle_togdone_src(struct udevice *dev,
981 u8 togdone_result)
982{
983 /*
984 * - set polarity (measure cc, vconn, tx)
985 * - set pull_up, pull_down
986 * - set cc1, cc2, and update to tcpm state machine
987 * - set I_COMP interrupt on
988 */
989 struct fusb302_chip *chip = dev_get_priv(dev);
990 u8 rd_mda = rd_mda_value[chip->src_current_status];
991 enum toggling_mode toggling_mode = chip->toggling_mode;
992 enum typec_cc_polarity cc_polarity;
993 enum typec_cc_status cc1, cc2;
994 int ret;
995
996 /*
997 * The toggle-engine will stop in a src state if it sees either Ra or
998 * Rd. Determine the status for both CC pins, starting with the one
999 * where toggling stopped, as that is where the switches point now.
1000 */
1001 if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1)
1002 ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC1, &cc1);
1003 else
1004 ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC2, &cc2);
1005 if (ret)
1006 return ret;
1007 /* we must turn off toggling before we can measure the other pin */
1008 ret = fusb302_set_toggling(dev, TOGGLING_MODE_OFF);
1009 if (ret) {
1010 dev_err(dev, "cannot set toggling mode off, ret=%d\n", ret);
1011 return ret;
1012 }
1013 /* get the status of the other pin */
1014 if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1)
1015 ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC2, &cc2);
1016 else
1017 ret = fusb302_get_src_cc_status(dev, TYPEC_POLARITY_CC1, &cc1);
1018 if (ret)
1019 return ret;
1020
1021 /* determine polarity based on the status of both pins */
1022 if (cc1 == TYPEC_CC_RD && (cc2 == TYPEC_CC_OPEN || cc2 == TYPEC_CC_RA)) {
1023 cc_polarity = TYPEC_POLARITY_CC1;
1024 } else if (cc2 == TYPEC_CC_RD &&
1025 (cc1 == TYPEC_CC_OPEN || cc1 == TYPEC_CC_RA)) {
1026 cc_polarity = TYPEC_POLARITY_CC2;
1027 } else {
1028 dev_err(dev, "unexpected CC status cc1=%s, cc2=%s, restarting toggling\n",
1029 typec_cc_status_name[cc1],
1030 typec_cc_status_name[cc2]);
1031 return fusb302_set_toggling(dev, toggling_mode);
1032 }
1033 /* set polarity and pull_up, pull_down */
1034 ret = fusb302_set_cc_polarity_and_pull(dev, cc_polarity, true, false);
1035 if (ret < 0) {
1036 dev_err(dev, "cannot set cc polarity %s, ret=%d\n",
1037 cc_polarity_name[cc_polarity], ret);
1038 return ret;
1039 }
1040 /* update tcpm with the new cc value */
1041 if (chip->cc1 != cc1 || chip->cc2 != cc2) {
1042 chip->cc1 = cc1;
1043 chip->cc2 = cc2;
1044 tcpm_cc_change(dev);
1045 }
1046 /* set MDAC to Rd threshold, and unmask I_COMP for unplug detection */
1047 ret = fusb302_i2c_write(dev, FUSB_REG_MEASURE, rd_mda);
1048 if (ret)
1049 return ret;
1050 /* unmask comp_chng interrupt */
1051 ret = fusb302_i2c_clear_bits(dev, FUSB_REG_MASK,
1052 FUSB_REG_MASK_COMP_CHNG);
1053 if (ret) {
1054 dev_err(dev, "cannot unmask comp_chng irq, ret=%d\n", ret);
1055 return ret;
1056 }
1057 chip->intr_comp_chng = true;
1058 dev_dbg(dev, "detected cc1=%s, cc2=%s\n",
1059 typec_cc_status_name[cc1],
1060 typec_cc_status_name[cc2]);
1061
1062 return ret;
1063}
1064
1065static int fusb302_handle_togdone(struct udevice *dev)
1066{
1067 struct fusb302_chip *chip = dev_get_priv(dev);
1068 u8 togdone_result, status1a;
1069 int ret;
1070
1071 ret = fusb302_i2c_read(dev, FUSB_REG_STATUS1A, &status1a);
1072 if (ret < 0)
1073 return ret;
1074 togdone_result = (status1a >> FUSB_REG_STATUS1A_TOGSS_POS) &
1075 FUSB_REG_STATUS1A_TOGSS_MASK;
1076 switch (togdone_result) {
1077 case FUSB_REG_STATUS1A_TOGSS_SNK1:
1078 case FUSB_REG_STATUS1A_TOGSS_SNK2:
1079 return fusb302_handle_togdone_snk(dev, togdone_result);
1080 case FUSB_REG_STATUS1A_TOGSS_SRC1:
1081 case FUSB_REG_STATUS1A_TOGSS_SRC2:
1082 return fusb302_handle_togdone_src(dev, togdone_result);
1083 case FUSB_REG_STATUS1A_TOGSS_AA:
1084 /* doesn't support */
1085 dev_err(dev, "AudioAccessory not supported\n");
1086 fusb302_set_toggling(dev, chip->toggling_mode);
1087 break;
1088 default:
1089 dev_err(dev, "TOGDONE with an invalid state: %d\n",
1090 togdone_result);
1091 fusb302_set_toggling(dev, chip->toggling_mode);
1092 break;
1093 }
1094 return ret;
1095}
1096
1097static int fusb302_pd_reset(struct udevice *dev)
1098{
1099 return fusb302_i2c_set_bits(dev, FUSB_REG_RESET,
1100 FUSB_REG_RESET_PD_RESET);
1101}
1102
1103static int fusb302_pd_read_message(struct udevice *dev,
1104 struct pd_message *msg)
1105{
1106 int len, ret;
1107 u8 crc[4];
1108 u8 token;
1109
1110 /* first SOP token */
1111 ret = fusb302_i2c_read(dev, FUSB_REG_FIFOS, &token);
1112 if (ret)
1113 return ret;
1114 ret = fusb302_i2c_block_read(dev, FUSB_REG_FIFOS, 2,
1115 (u8 *)&msg->header);
1116 if (ret)
1117 return ret;
1118 len = pd_header_cnt_le(msg->header) * 4;
1119 /* add 4 to length to include the CRC */
1120 if (len > PD_MAX_PAYLOAD * 4) {
1121 dev_err(dev, "PD message too long %d\n", len);
1122 return -EINVAL;
1123 }
1124 if (len > 0) {
1125 ret = fusb302_i2c_block_read(dev, FUSB_REG_FIFOS, len,
1126 (u8 *)msg->payload);
1127 if (ret)
1128 return ret;
1129 }
1130 /* another 4 bytes to read CRC out */
1131 ret = fusb302_i2c_block_read(dev, FUSB_REG_FIFOS, 4, crc);
1132 if (ret)
1133 return ret;
1134 dev_dbg(dev, "Received PD message (header=0x%x len=%d)\n", msg->header, len);
1135
1136 /*
1137 * Check if we've read off a GoodCRC message. If so then indicate to
1138 * TCPM that the previous transmission has completed. Otherwise we pass
1139 * the received message over to TCPM for processing.
1140 *
1141 * We make this check here instead of basing the reporting decision on
1142 * the IRQ event type, as it's possible for the chip to report the
1143 * TX_SUCCESS and GCRCSENT events out of order on occasion, so we need
1144 * to check the message type to ensure correct reporting to TCPM.
1145 */
1146 if (!len && (pd_header_type_le(msg->header) == PD_CTRL_GOOD_CRC))
1147 tcpm_pd_transmit_complete(dev, TCPC_TX_SUCCESS);
1148 else
1149 tcpm_pd_receive(dev, msg);
1150
1151 return ret;
1152}
1153
1154static void fusb302_interrupt_handle(struct udevice *dev)
1155{
1156 struct fusb302_chip *chip = dev_get_priv(dev);
1157 u8 interrupt;
1158 u8 interrupta;
1159 u8 interruptb;
1160 u8 status0;
1161 bool vbus_present;
1162 bool comp_result;
1163 bool intr_togdone;
1164 bool intr_bc_lvl;
1165 bool intr_comp_chng;
1166 struct pd_message pd_msg;
1167 int ret;
1168
1169 /* grab a snapshot of intr flags */
1170 intr_togdone = chip->intr_togdone;
1171 intr_bc_lvl = chip->intr_bc_lvl;
1172 intr_comp_chng = chip->intr_comp_chng;
1173
1174 ret = fusb302_i2c_read(dev, FUSB_REG_INTERRUPT, &interrupt);
1175 if (ret)
1176 return;
1177 ret = fusb302_i2c_read(dev, FUSB_REG_INTERRUPTA, &interrupta);
1178 if (ret)
1179 return;
1180 ret = fusb302_i2c_read(dev, FUSB_REG_INTERRUPTB, &interruptb);
1181 if (ret)
1182 return;
1183 ret = fusb302_i2c_read(dev, FUSB_REG_STATUS0, &status0);
1184 if (ret)
1185 return;
1186
1187 /*
1188 * Since we are polling the IRQs, avoid printing messages when there
1189 * no interrupts at all to avoid spamming the log.
1190 */
1191 if (interrupt != 0 || interrupta != 0 || interruptb != 0)
1192 dev_dbg(dev, "IRQ: 0x%02x, a: 0x%02x, b: 0x%02x, status0: 0x%02x\n",
1193 interrupt, interrupta, interruptb, status0);
1194
1195 if (interrupt & FUSB_REG_INTERRUPT_VBUSOK) {
1196 vbus_present = !!(status0 & FUSB_REG_STATUS0_VBUSOK);
1197 dev_dbg(dev, "IRQ: VBUS_OK, vbus=%s\n",
1198 vbus_present ? "On" : "Off");
1199 if (vbus_present != chip->vbus_present) {
1200 chip->vbus_present = vbus_present;
1201 tcpm_vbus_change(dev);
1202 }
1203 }
1204
1205 if ((interrupta & FUSB_REG_INTERRUPTA_TOGDONE) && intr_togdone) {
1206 dev_dbg(dev, "IRQ: TOGDONE\n");
1207 ret = fusb302_handle_togdone(dev);
1208 if (ret) {
1209 dev_err(dev, "handle togdone error: %d\n", ret);
1210 return;
1211 }
1212 }
1213
1214 if ((interrupt & FUSB_REG_INTERRUPT_BC_LVL) && intr_bc_lvl) {
1215 dev_dbg(dev, "IRQ: BC_LVL, handler pending\n");
1216 fusb302_bc_lvl_handler(dev);
1217 }
1218
1219 if ((interrupt & FUSB_REG_INTERRUPT_COMP_CHNG) && intr_comp_chng) {
1220 comp_result = !!(status0 & FUSB_REG_STATUS0_COMP);
1221 dev_dbg(dev, "IRQ: COMP_CHNG, comp=%s\n",
1222 comp_result ? "true" : "false");
1223 if (comp_result) {
1224 /* cc level > Rd_threshold, detach */
1225 chip->cc1 = TYPEC_CC_OPEN;
1226 chip->cc2 = TYPEC_CC_OPEN;
1227 tcpm_cc_change(dev);
1228 }
1229 }
1230
1231 if (interrupt & FUSB_REG_INTERRUPT_COLLISION) {
1232 dev_dbg(dev, "IRQ: PD collision\n");
1233 tcpm_pd_transmit_complete(dev, TCPC_TX_FAILED);
1234 }
1235
1236 if (interrupta & FUSB_REG_INTERRUPTA_RETRYFAIL) {
1237 dev_dbg(dev, "IRQ: PD retry failed\n");
1238 tcpm_pd_transmit_complete(dev, TCPC_TX_FAILED);
1239 }
1240
1241 if (interrupta & FUSB_REG_INTERRUPTA_HARDSENT) {
1242 dev_dbg(dev, "IRQ: PD hardreset sent\n");
1243 ret = fusb302_pd_reset(dev);
1244 if (ret) {
1245 dev_err(dev, "cannot PD reset, ret=%d\n", ret);
1246 return;
1247 }
1248 tcpm_pd_transmit_complete(dev, TCPC_TX_SUCCESS);
1249 }
1250
1251 if (interrupta & FUSB_REG_INTERRUPTA_TX_SUCCESS) {
1252 dev_dbg(dev, "IRQ: PD tx success\n");
1253 ret = fusb302_pd_read_message(dev, &pd_msg);
1254 if (ret) {
1255 dev_err(dev, "cannot read in PD message, ret=%d\n", ret);
1256 return;
1257 }
1258 }
1259
1260 if (interrupta & FUSB_REG_INTERRUPTA_HARDRESET) {
1261 dev_dbg(dev, "IRQ: PD received hardreset\n");
1262 ret = fusb302_pd_reset(dev);
1263 if (ret) {
1264 dev_err(dev, "cannot PD reset, ret=%d\n", ret);
1265 return;
1266 }
1267 tcpm_pd_hard_reset(dev);
1268 }
1269
1270 if (interruptb & FUSB_REG_INTERRUPTB_GCRCSENT) {
1271 dev_dbg(dev, "IRQ: PD sent good CRC\n");
1272 ret = fusb302_pd_read_message(dev, &pd_msg);
1273 if (ret) {
1274 dev_err(dev, "cannot read in PD message, ret=%d\n", ret);
1275 return;
1276 }
1277 }
1278}
1279
1280static void fusb302_poll_event(struct udevice *dev)
1281{
1282 fusb302_interrupt_handle(dev);
1283}
1284
1285static int fusb302_get_connector_node(struct udevice *dev, ofnode *connector_node)
1286{
1287 *connector_node = dev_read_subnode(dev, "connector");
1288 if (!ofnode_valid(*connector_node)) {
1289 dev_err(dev, "'connector' node is not found\n");
1290 return -ENODEV;
1291 }
1292
1293 return 0;
1294}
1295
1296static struct dm_tcpm_ops fusb302_ops = {
1297 .get_connector_node = fusb302_get_connector_node,
1298 .init = fusb302_init,
1299 .get_vbus = fusb302_get_vbus,
1300 .set_cc = fusb302_set_cc,
1301 .get_cc = fusb302_get_cc,
1302 .set_vconn = fusb302_set_vconn,
1303 .set_vbus = fusb302_set_vbus,
1304 .set_pd_rx = fusb302_set_pd_rx,
1305 .set_roles = fusb302_set_roles,
1306 .start_toggling = fusb302_start_toggling,
1307 .pd_transmit = fusb302_pd_transmit,
1308 .poll_event = fusb302_poll_event,
1309 .enter_low_power_mode = fusb302_enter_low_power_mode,
1310};
1311
1312static const struct udevice_id fusb302_ids[] = {
1313 { .compatible = "fcs,fusb302" },
1314 { }
1315};
1316
1317U_BOOT_DRIVER(fusb302) = {
1318 .name = "fusb302",
1319 .id = UCLASS_TCPM,
1320 .of_match = fusb302_ids,
1321 .ops = &fusb302_ops,
1322 .priv_auto = sizeof(struct fusb302_chip),
1323};