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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenk2262cfe2002-11-18 00:14:45 +00002/*
3 * (C) Copyright 2002
Albert ARIBAUDfa82f872011-08-04 18:45:45 +02004 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
wdenk2262cfe2002-11-18 00:14:45 +00005 */
6
wdenk3bac3512003-03-12 10:41:04 +00007#ifndef _U_BOOT_I386_H_
8#define _U_BOOT_I386_H_ 1
wdenk2262cfe2002-11-18 00:14:45 +00009
Simon Glass3ff240c2017-05-17 08:22:56 -060010struct global_data;
11
Bin Meng002610f2015-06-07 11:33:13 +080012extern char gdt_rom[];
13
wdenk2262cfe2002-11-18 00:14:45 +000014/* cpu/.../cpu.c */
Simon Glass8b37c762014-11-06 13:20:06 -070015int arch_cpu_init(void);
Simon Glassc0069e92019-04-25 21:58:42 -060016
17/**
18 * x86_cpu_init_f() - Set up basic features of the x86 CPU
19 *
20 * 0 on success, -ve on error
21 */
Graeme Russ0ea76e92011-02-12 15:11:35 +110022int x86_cpu_init_f(void);
Simon Glassc0069e92019-04-25 21:58:42 -060023
24/**
25 * x86_cpu_reinit_f() - Set up the CPU a second time
26 *
27 * Once cpu_init_f() has been called (e.g. in SPL) we should not call it
28 * again (e.g. in U-Boot proper) since it sets up the state from scratch.
29 * Call this function in later phases of U-Boot instead. It reads the CPU
30 * identify so that CPU functions can be used correctly, but does not change
31 * anything.
32 *
33 * @return 0 (indicating success, to mimic cpu_init_f())
34 */
35int x86_cpu_reinit_f(void);
36
Graeme Russ1c409bc2009-11-24 20:04:21 +110037int cpu_init_f(void);
Simon Glass3ff240c2017-05-17 08:22:56 -060038void setup_gdt(struct global_data *id, u64 *gdt_addr);
Bin Meng002610f2015-06-07 11:33:13 +080039/*
40 * Setup FSP execution environment GDT to use the one we used in
41 * arch/x86/cpu/start16.S and reload the segment registers.
42 */
43void setup_fsp_gdt(void);
Graeme Russd6532442011-12-27 22:46:43 +110044int init_cache(void);
Gabe Blackf30fc4d2012-10-20 12:33:10 +000045int cleanup_before_linux(void);
Graeme Russ8c63d472009-02-24 21:14:45 +110046
47/* cpu/.../timer.c */
48void timer_isr(void *);
49typedef void (timer_fnc_t) (void);
50int register_timer_isr (timer_fnc_t *isr_func);
Simon Glasse761ecd2013-04-17 16:13:36 +000051unsigned long get_tbclk_mhz(void);
52void timer_set_base(uint64_t base);
Bin Mengda3fe242015-10-22 19:13:30 -070053int i8254_init(void);
Graeme Russ8c63d472009-02-24 21:14:45 +110054
Graeme Russabf0cd32009-02-24 21:13:40 +110055/* cpu/.../interrupts.c */
56int cpu_init_interrupts(void);
57
Simon Glasse1ffd812014-11-06 13:20:08 -070058int cleanup_before_linux(void);
59int x86_cleanup_before_linux(void);
60void x86_enable_caches(void);
61void x86_disable_caches(void);
62int x86_init_cache(void);
Simon Glasse1ffd812014-11-06 13:20:08 -070063ulong board_get_usable_ram_top(ulong total_size);
Simon Glass727c1a92014-11-10 18:00:26 -070064int default_print_cpuinfo(void);
Simon Glasse1ffd812014-11-06 13:20:08 -070065
Simon Glass447f8b02015-01-27 22:13:42 -070066/* Set up a UART which can be used with printch(), printhex8(), etc. */
Stefan Roesed5211972016-01-19 14:24:12 +010067int setup_internal_uart(int enable);
Simon Glass447f8b02015-01-27 22:13:42 -070068
Graeme Russ79ea6b82010-04-24 00:05:48 +100069void setup_pcat_compatibility(void);
70
wdenk7a8e9bed2003-05-31 18:35:21 +000071void isa_unmap_rom(u32 addr);
72u32 isa_map_rom(u32 bus_addr, int size);
73
Graeme Russfea25722011-04-13 19:43:28 +100074/* arch/x86/lib/... */
wdenk7a8e9bed2003-05-31 18:35:21 +000075int video_bios_init(void);
wdenk2262cfe2002-11-18 00:14:45 +000076
Bin Mengba658082017-04-21 07:24:39 -070077/* arch/x86/lib/fsp/... */
78
79/**
80 * fsp_save_s3_stack() - save stack address to CMOS for next S3 boot
81 *
82 * At the end of pre-relocation phase, save the new stack address
83 * to CMOS and use it as the stack on next S3 boot for fsp_init()
84 * continuation function.
85 *
86 * @return: 0 if OK, -ve on error
87 */
88int fsp_save_s3_stack(void);
89
Graeme Russf48dd6f2012-01-01 15:06:39 +110090void board_init_f_r_trampoline(ulong) __attribute__ ((noreturn));
91void board_init_f_r(void) __attribute__ ((noreturn));
wdenk2262cfe2002-11-18 00:14:45 +000092
Bin Mengafbf1402015-04-24 18:10:06 +080093int arch_misc_init(void);
94
Vadim Bendebury2f899e02012-10-23 18:04:32 +000095/* Read the time stamp counter */
Simon Glassd8819f92013-06-11 11:14:52 -070096static inline __attribute__((no_instrument_function)) uint64_t rdtsc(void)
Vadim Bendebury2f899e02012-10-23 18:04:32 +000097{
98 uint32_t high, low;
99 __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high));
100 return (((uint64_t)high) << 32) | low;
101}
102
103/* board/... */
104void timer_set_tsc_base(uint64_t new_base);
105uint64_t timer_get_tsc(void);
106
Simon Glass65dd74a2014-11-12 22:42:28 -0700107void quick_ram_check(void);
108
Simon Glassbdc88d42014-12-29 19:32:24 -0700109#define PCI_VGA_RAM_IMAGE_START 0xc0000
110
wdenk3bac3512003-03-12 10:41:04 +0000111#endif /* _U_BOOT_I386_H_ */