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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Fabio Estevam0c5e2662013-09-26 22:59:25 -03002/*
3 * Copyright (C) 2013 Freescale Semiconductor, Inc.
4 *
5 * Author: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam0c5e2662013-09-26 22:59:25 -03006 */
7
Simon Glass52559322019-11-14 12:57:46 -07008#include <init.h>
Simon Glass90526e92020-05-10 11:39:56 -06009#include <net.h>
Fabio Estevam0c5e2662013-09-26 22:59:25 -030010#include <asm/arch/clock.h>
11#include <asm/arch/imx-regs.h>
12#include <asm/arch/iomux.h>
Simon Glass9fb625c2019-08-01 09:46:51 -060013#include <env.h>
Giuseppe Pagano078813d2013-11-15 17:42:51 +010014#include <malloc.h>
Fabio Estevam0c5e2662013-09-26 22:59:25 -030015#include <asm/arch/mx6-pins.h>
Simon Glass401d1c42020-10-30 21:38:53 -060016#include <asm/global_data.h>
Simon Glassc05ed002020-05-10 11:40:11 -060017#include <linux/delay.h>
Masahiro Yamada1221ce42016-09-21 11:28:55 +090018#include <linux/errno.h>
Fabio Estevam0c5e2662013-09-26 22:59:25 -030019#include <asm/gpio.h>
Stefano Babic552a8482017-06-29 10:16:06 +020020#include <asm/mach-imx/iomux-v3.h>
21#include <asm/mach-imx/sata.h>
Fabio Estevam0c5e2662013-09-26 22:59:25 -030022#include <asm/arch/crm_regs.h>
23#include <asm/io.h>
24#include <asm/arch/sys_proto.h>
Giuseppe Pagano078813d2013-11-15 17:42:51 +010025#include <micrel.h>
26#include <miiphy.h>
27#include <netdev.h>
Fabio Estevam0c5e2662013-09-26 22:59:25 -030028
29DECLARE_GLOBAL_DATA_PTR;
30
31#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
32 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
33 PAD_CTL_SRE_FAST | PAD_CTL_HYS)
34
Giuseppe Pagano078813d2013-11-15 17:42:51 +010035#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
36 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
37
Fabio Estevam0c5e2662013-09-26 22:59:25 -030038#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
39 PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
40 PAD_CTL_SRE_FAST | PAD_CTL_HYS)
41
42#define WDT_EN IMX_GPIO_NR(5, 4)
43#define WDT_TRG IMX_GPIO_NR(3, 19)
44
45int dram_init(void)
46{
vpeter478506c22015-08-03 12:49:05 +020047 gd->ram_size = imx_ddr_size();
Fabio Estevam0c5e2662013-09-26 22:59:25 -030048
49 return 0;
50}
51
52static iomux_v3_cfg_t const uart2_pads[] = {
vpeter478506c22015-08-03 12:49:05 +020053 IOMUX_PADS(PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
54 IOMUX_PADS(PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
Fabio Estevam0c5e2662013-09-26 22:59:25 -030055};
56
Fabio Estevam0c5e2662013-09-26 22:59:25 -030057static iomux_v3_cfg_t const wdog_pads[] = {
vpeter478506c22015-08-03 12:49:05 +020058 IOMUX_PADS(PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL)),
59 IOMUX_PADS(PAD_EIM_D19__GPIO3_IO19),
Fabio Estevam0c5e2662013-09-26 22:59:25 -030060};
61
Giuseppe Pagano078813d2013-11-15 17:42:51 +010062int mx6_rgmii_rework(struct phy_device *phydev)
63{
64 /*
65 * Bug: Apparently uDoo does not works with Gigabit switches...
66 * Limiting speed to 10/100Mbps, and setting master mode, seems to
67 * be the only way to have a successfull PHY auto negotiation.
68 * How to fix: Understand why Linux kernel do not have this issue.
69 */
70 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0x1c00);
71
72 /* control data pad skew - devaddr = 0x02, register = 0x04 */
73 ksz9031_phy_extended_write(phydev, 0x02,
74 MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
75 MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
76 /* rx data pad skew - devaddr = 0x02, register = 0x05 */
77 ksz9031_phy_extended_write(phydev, 0x02,
78 MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
79 MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
80 /* tx data pad skew - devaddr = 0x02, register = 0x05 */
81 ksz9031_phy_extended_write(phydev, 0x02,
82 MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
83 MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
84 /* gtx and rx clock pad skew - devaddr = 0x02, register = 0x08 */
85 ksz9031_phy_extended_write(phydev, 0x02,
86 MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
87 MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x03FF);
88 return 0;
89}
90
Giuseppe Pagano078813d2013-11-15 17:42:51 +010091static void setup_iomux_enet(void)
92{
Giuseppe Pagano078813d2013-11-15 17:42:51 +010093 gpio_direction_output(IMX_GPIO_NR(2, 31), 1); /* Power supply on */
94
95 gpio_direction_output(IMX_GPIO_NR(3, 23), 0); /* assert PHY rst */
96
97 gpio_direction_output(IMX_GPIO_NR(6, 24), 1);
98 gpio_direction_output(IMX_GPIO_NR(6, 25), 1);
99 gpio_direction_output(IMX_GPIO_NR(6, 27), 1);
100 gpio_direction_output(IMX_GPIO_NR(6, 28), 1);
101 gpio_direction_output(IMX_GPIO_NR(6, 29), 1);
102 udelay(1000);
103
104 gpio_set_value(IMX_GPIO_NR(3, 23), 1); /* deassert PHY rst */
105
106 /* Need 100ms delay to exit from reset. */
107 udelay(1000 * 100);
108
109 gpio_free(IMX_GPIO_NR(6, 24));
110 gpio_free(IMX_GPIO_NR(6, 25));
111 gpio_free(IMX_GPIO_NR(6, 27));
112 gpio_free(IMX_GPIO_NR(6, 28));
113 gpio_free(IMX_GPIO_NR(6, 29));
Giuseppe Pagano078813d2013-11-15 17:42:51 +0100114}
115
Fabio Estevam0c5e2662013-09-26 22:59:25 -0300116static void setup_iomux_uart(void)
117{
vpeter478506c22015-08-03 12:49:05 +0200118 SETUP_IOMUX_PADS(uart2_pads);
Fabio Estevam0c5e2662013-09-26 22:59:25 -0300119}
120
121static void setup_iomux_wdog(void)
122{
vpeter478506c22015-08-03 12:49:05 +0200123 SETUP_IOMUX_PADS(wdog_pads);
Fabio Estevam0c5e2662013-09-26 22:59:25 -0300124 gpio_direction_output(WDT_TRG, 0);
125 gpio_direction_output(WDT_EN, 1);
Giuseppe Paganodb6801d2013-11-15 17:42:54 +0100126 gpio_direction_input(WDT_TRG);
Fabio Estevam0c5e2662013-09-26 22:59:25 -0300127}
128
Fabio Estevam0c5e2662013-09-26 22:59:25 -0300129int board_early_init_f(void)
130{
131 setup_iomux_wdog();
132 setup_iomux_uart();
133
134 return 0;
135}
136
Giuseppe Pagano078813d2013-11-15 17:42:51 +0100137int board_phy_config(struct phy_device *phydev)
138{
139 mx6_rgmii_rework(phydev);
140 if (phydev->drv->config)
141 phydev->drv->config(phydev);
142
143 return 0;
144}
145
Fabio Estevam0c5e2662013-09-26 22:59:25 -0300146int board_init(void)
147{
148 /* address of boot parameters */
149 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
150
vpeter478506c22015-08-03 12:49:05 +0200151 return 0;
152}
153
154int board_late_init(void)
155{
156#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
157 if (is_cpu_type(MXC_CPU_MX6Q))
Simon Glass382bee52017-08-03 12:22:09 -0600158 env_set("board_rev", "MX6Q");
vpeter478506c22015-08-03 12:49:05 +0200159 else
Simon Glass382bee52017-08-03 12:22:09 -0600160 env_set("board_rev", "MX6DL");
Giuseppe Pagano98d01222013-11-28 12:32:49 +0100161#endif
Peter Robinsondec77552021-04-02 17:52:51 +0100162 setup_iomux_enet();
163
Fabio Estevam0c5e2662013-09-26 22:59:25 -0300164 return 0;
165}
166
167int checkboard(void)
168{
vpeter478506c22015-08-03 12:49:05 +0200169 if (is_cpu_type(MXC_CPU_MX6Q))
170 puts("Board: Udoo Quad\n");
171 else
172 puts("Board: Udoo DualLite\n");
Fabio Estevam0c5e2662013-09-26 22:59:25 -0300173
174 return 0;
175}