Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2014 Google, Inc |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
Simon Glass | 0914011 | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 7 | #include <command.h> |
Simon Glass | 240752c | 2020-07-17 08:48:22 -0600 | [diff] [blame] | 8 | #include <log.h> |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 9 | #include <asm/msr.h> |
Simon Glass | 240752c | 2020-07-17 08:48:22 -0600 | [diff] [blame] | 10 | #include <asm/mp.h> |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 11 | #include <asm/mtrr.h> |
| 12 | |
Simon Glass | e68b128 | 2020-07-17 08:48:27 -0600 | [diff] [blame] | 13 | static int do_mtrr_set(int cpu_select, uint reg, int argc, char *const argv[]) |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 14 | { |
| 15 | const char *typename = argv[0]; |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 16 | uint32_t start, size; |
| 17 | uint64_t base, mask; |
Simon Glass | 4fb2536 | 2023-07-15 21:38:36 -0600 | [diff] [blame] | 18 | int type = -1; |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 19 | bool valid; |
Simon Glass | e68b128 | 2020-07-17 08:48:27 -0600 | [diff] [blame] | 20 | int ret; |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 21 | |
| 22 | if (argc < 3) |
| 23 | return CMD_RET_USAGE; |
Simon Glass | 4fb2536 | 2023-07-15 21:38:36 -0600 | [diff] [blame] | 24 | type = mtrr_get_type_by_name(typename); |
| 25 | if (type < 0) { |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 26 | printf("Invalid type name %s\n", typename); |
| 27 | return CMD_RET_USAGE; |
| 28 | } |
Simon Glass | 7e5f460 | 2021-07-24 09:03:29 -0600 | [diff] [blame] | 29 | start = hextoul(argv[1], NULL); |
| 30 | size = hextoul(argv[2], NULL); |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 31 | |
| 32 | base = start | type; |
| 33 | valid = native_read_msr(MTRR_PHYS_MASK_MSR(reg)) & MTRR_PHYS_MASK_VALID; |
| 34 | mask = ~((uint64_t)size - 1); |
| 35 | mask &= (1ULL << CONFIG_CPU_ADDR_BITS) - 1; |
| 36 | if (valid) |
| 37 | mask |= MTRR_PHYS_MASK_VALID; |
| 38 | |
Simon Glass | e68b128 | 2020-07-17 08:48:27 -0600 | [diff] [blame] | 39 | ret = mtrr_set(cpu_select, reg, base, mask); |
| 40 | if (ret) |
| 41 | return CMD_RET_FAILURE; |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 42 | |
| 43 | return 0; |
| 44 | } |
| 45 | |
Simon Glass | 0914011 | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 46 | static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc, |
| 47 | char *const argv[]) |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 48 | { |
Simon Glass | 29d2d64 | 2020-09-22 14:54:51 -0600 | [diff] [blame] | 49 | int reg_count = mtrr_get_var_count(); |
Simon Glass | b2a76b3 | 2020-07-17 08:48:28 -0600 | [diff] [blame] | 50 | int cmd; |
Simon Glass | 240752c | 2020-07-17 08:48:22 -0600 | [diff] [blame] | 51 | int cpu_select; |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 52 | uint reg; |
Simon Glass | b2a76b3 | 2020-07-17 08:48:28 -0600 | [diff] [blame] | 53 | int ret; |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 54 | |
Simon Glass | 240752c | 2020-07-17 08:48:22 -0600 | [diff] [blame] | 55 | cpu_select = MP_SELECT_BSP; |
Simon Glass | f91f5ab | 2020-07-17 08:48:29 -0600 | [diff] [blame] | 56 | if (argc >= 3 && !strcmp("-c", argv[1])) { |
| 57 | const char *cpustr; |
| 58 | |
| 59 | cpustr = argv[2]; |
| 60 | if (*cpustr == 'a') |
| 61 | cpu_select = MP_SELECT_ALL; |
| 62 | else |
| 63 | cpu_select = simple_strtol(cpustr, NULL, 16); |
| 64 | argc -= 2; |
| 65 | argv += 2; |
| 66 | } |
Simon Glass | b2a76b3 | 2020-07-17 08:48:28 -0600 | [diff] [blame] | 67 | argc--; |
| 68 | argv++; |
| 69 | cmd = argv[0] ? *argv[0] : 0; |
| 70 | if (argc < 1 || !cmd) { |
| 71 | cmd = 'l'; |
| 72 | reg = 0; |
Wolfgang Wallner | cf9f380 | 2020-08-14 09:55:24 +0200 | [diff] [blame] | 73 | } |
| 74 | if (cmd != 'l') { |
Simon Glass | b2a76b3 | 2020-07-17 08:48:28 -0600 | [diff] [blame] | 75 | if (argc < 2) |
| 76 | return CMD_RET_USAGE; |
Simon Glass | 7e5f460 | 2021-07-24 09:03:29 -0600 | [diff] [blame] | 77 | reg = hextoul(argv[1], NULL); |
Simon Glass | 29d2d64 | 2020-09-22 14:54:51 -0600 | [diff] [blame] | 78 | if (reg >= reg_count) { |
Simon Glass | b2a76b3 | 2020-07-17 08:48:28 -0600 | [diff] [blame] | 79 | printf("Invalid register number\n"); |
| 80 | return CMD_RET_USAGE; |
| 81 | } |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 82 | } |
Simon Glass | b2a76b3 | 2020-07-17 08:48:28 -0600 | [diff] [blame] | 83 | if (cmd == 'l') { |
Simon Glass | 2a3d9a7 | 2020-07-17 08:48:31 -0600 | [diff] [blame] | 84 | bool first; |
| 85 | int i; |
| 86 | |
| 87 | i = mp_first_cpu(cpu_select); |
| 88 | if (i < 0) { |
| 89 | printf("Invalid CPU (err=%d)\n", i); |
| 90 | return CMD_RET_FAILURE; |
| 91 | } |
| 92 | first = true; |
| 93 | for (; i >= 0; i = mp_next_cpu(cpu_select, i)) { |
| 94 | if (!first) |
| 95 | printf("\n"); |
| 96 | printf("CPU %d:\n", i); |
Simon Glass | 4fb2536 | 2023-07-15 21:38:36 -0600 | [diff] [blame] | 97 | ret = mtrr_list(reg_count, i); |
Simon Glass | 2a3d9a7 | 2020-07-17 08:48:31 -0600 | [diff] [blame] | 98 | if (ret) { |
Simon Glass | 0fb19ff | 2023-05-04 16:54:54 -0600 | [diff] [blame] | 99 | printf("Failed to read CPU %s (err=%d)\n", |
| 100 | i < MP_SELECT_ALL ? simple_itoa(i) : "", |
Simon Glass | 2a3d9a7 | 2020-07-17 08:48:31 -0600 | [diff] [blame] | 101 | ret); |
| 102 | return CMD_RET_FAILURE; |
| 103 | } |
| 104 | first = false; |
| 105 | } |
Simon Glass | b2a76b3 | 2020-07-17 08:48:28 -0600 | [diff] [blame] | 106 | } else { |
| 107 | switch (cmd) { |
| 108 | case 'e': |
| 109 | ret = mtrr_set_valid(cpu_select, reg, true); |
| 110 | break; |
| 111 | case 'd': |
| 112 | ret = mtrr_set_valid(cpu_select, reg, false); |
| 113 | break; |
| 114 | case 's': |
| 115 | ret = do_mtrr_set(cpu_select, reg, argc - 2, argv + 2); |
| 116 | break; |
| 117 | default: |
| 118 | return CMD_RET_USAGE; |
| 119 | } |
| 120 | if (ret) { |
| 121 | printf("Operation failed (err=%d)\n", ret); |
| 122 | return CMD_RET_FAILURE; |
| 123 | } |
| 124 | } |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 125 | |
| 126 | return 0; |
| 127 | } |
| 128 | |
| 129 | U_BOOT_CMD( |
Simon Glass | f91f5ab | 2020-07-17 08:48:29 -0600 | [diff] [blame] | 130 | mtrr, 8, 1, do_mtrr, |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 131 | "Use x86 memory type range registers (32-bit only)", |
| 132 | "[list] - list current registers\n" |
| 133 | "set <reg> <type> <start> <size> - set a register\n" |
| 134 | "\t<type> is Uncacheable, Combine, Through, Protect, Back\n" |
| 135 | "disable <reg> - disable a register\n" |
Simon Glass | f91f5ab | 2020-07-17 08:48:29 -0600 | [diff] [blame] | 136 | "enable <reg> - enable a register\n" |
| 137 | "\n" |
| 138 | "Precede command with '-c <n>|all' to access a particular hex CPU, e.g.\n" |
| 139 | " mtrr -c all list; mtrr -c 2e list" |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 140 | ); |