blob: ab7dd388c9ded719c056196e5702aa2396e287f1 [file] [log] [blame]
Aubrey Li26bf7de2007-03-19 01:24:52 +08001/****************************************************************
2 * $ID: i2c.c 24 Oct 2006 12:00:00 +0800 $ *
3 * *
4 * Description: *
5 * *
6 * Maintainer: sonicz <sonic.zhang@analog.com> *
7 * *
8 * CopyRight (c) 2006 Analog Device *
9 * All rights reserved. *
10 * *
11 * This file is free software; *
12 * you are free to modify and/or redistribute it *
13 * under the terms of the GNU General Public Licence (GPL).*
14 * *
15 ****************************************************************/
16
17#include <common.h>
18
19#ifdef CONFIG_HARD_I2C
20
21#include <asm/blackfin.h>
22#include <i2c.h>
23#include <asm/io.h>
Mike Frysingerd4d77302008-02-04 19:26:55 -050024#include <asm/mach-common/bits/twi.h>
Aubrey Li26bf7de2007-03-19 01:24:52 +080025
Wolfgang Denk1218abf2007-09-15 20:48:41 +020026DECLARE_GLOBAL_DATA_PTR;
27
Aubrey Li26bf7de2007-03-19 01:24:52 +080028#ifdef DEBUG_I2C
29#define PRINTD(fmt,args...) do { \
Aubrey Li26bf7de2007-03-19 01:24:52 +080030 if (gd->have_console) \
31 printf(fmt ,##args); \
32 } while (0)
33#else
34#define PRINTD(fmt,args...)
35#endif
36
37#ifndef CONFIG_TWICLK_KHZ
38#define CONFIG_TWICLK_KHZ 50
39#endif
40
41/* All transfers are described by this data structure */
42struct i2c_msg {
43 u16 addr; /* slave address */
44 u16 flags;
45#define I2C_M_STOP 0x2
46#define I2C_M_RD 0x1
47 u16 len; /* msg length */
48 u8 *buf; /* pointer to msg data */
49};
50
51/**
52 * i2c_reset: - reset the host controller
53 *
54 */
55
56static void i2c_reset(void)
57{
58 /* Disable TWI */
59 bfin_write_TWI_CONTROL(0);
60 sync();
61
62 /* Set TWI internal clock as 10MHz */
63 bfin_write_TWI_CONTROL(((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F);
64
65 /* Set Twi interface clock as specified */
66 if (CONFIG_TWICLK_KHZ > 400)
67 bfin_write_TWI_CLKDIV(((5 * 1024 / 400) << 8) | ((5 * 1024 /
68 400) & 0xFF));
69 else
70 bfin_write_TWI_CLKDIV(((5 * 1024 /
71 CONFIG_TWICLK_KHZ) << 8) | ((5 * 1024 /
72 CONFIG_TWICLK_KHZ)
73 & 0xFF));
74
75 /* Enable TWI */
76 bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() | TWI_ENA);
77 sync();
78}
79
80int wait_for_completion(struct i2c_msg *msg, int timeout_count)
81{
82 unsigned short twi_int_stat;
83 unsigned short mast_stat;
84 int i;
85
86 for (i = 0; i < timeout_count; i++) {
87 twi_int_stat = bfin_read_TWI_INT_STAT();
88 mast_stat = bfin_read_TWI_MASTER_STAT();
89
90 if (XMTSERV & twi_int_stat) {
91 /* Transmit next data */
92 if (msg->len > 0) {
93 bfin_write_TWI_XMT_DATA8(*(msg->buf++));
94 msg->len--;
95 } else if (msg->flags & I2C_M_STOP)
96 bfin_write_TWI_MASTER_CTL
97 (bfin_read_TWI_MASTER_CTL() | STOP);
98 sync();
99 /* Clear status */
100 bfin_write_TWI_INT_STAT(XMTSERV);
101 sync();
102 i = 0;
103 }
104 if (RCVSERV & twi_int_stat) {
105 if (msg->len > 0) {
106 /* Receive next data */
107 *(msg->buf++) = bfin_read_TWI_RCV_DATA8();
108 msg->len--;
109 } else if (msg->flags & I2C_M_STOP) {
110 bfin_write_TWI_MASTER_CTL
111 (bfin_read_TWI_MASTER_CTL() | STOP);
112 sync();
113 }
114 /* Clear interrupt source */
115 bfin_write_TWI_INT_STAT(RCVSERV);
116 sync();
117 i = 0;
118 }
119 if (MERR & twi_int_stat) {
120 bfin_write_TWI_INT_STAT(MERR);
121 bfin_write_TWI_INT_MASK(0);
122 bfin_write_TWI_MASTER_STAT(0x3e);
123 bfin_write_TWI_MASTER_CTL(0);
124 sync();
125 /*
126 * if both err and complete int stats are set,
127 * return proper results.
128 */
129 if (MCOMP & twi_int_stat) {
130 bfin_write_TWI_INT_STAT(MCOMP);
131 bfin_write_TWI_INT_MASK(0);
132 bfin_write_TWI_MASTER_CTL(0);
133 sync();
134 /*
135 * If it is a quick transfer,
136 * only address bug no data, not an err.
137 */
138 if (msg->len == 0 && mast_stat & BUFRDERR)
139 return 0;
140 /*
141 * If address not acknowledged return -3,
142 * else return 0.
143 */
144 else if (!(mast_stat & ANAK))
145 return 0;
146 else
147 return -3;
148 }
149 return -1;
150 }
151 if (MCOMP & twi_int_stat) {
152 bfin_write_TWI_INT_STAT(MCOMP);
153 sync();
154 bfin_write_TWI_INT_MASK(0);
155 bfin_write_TWI_MASTER_CTL(0);
156 sync();
157 return 0;
158 }
159 }
160 if (msg->flags & I2C_M_RD)
161 return -4;
162 else
163 return -2;
164}
165
166/**
167 * i2c_transfer: - Transfer one byte over the i2c bus
168 *
169 * This function can tranfer a byte over the i2c bus in both directions.
170 * It is used by the public API functions.
171 *
172 * @return: 0: transfer successful
173 * -1: transfer fail
174 * -2: transmit timeout
175 * -3: ACK missing
176 * -4: receive timeout
177 * -5: controller not ready
178 */
179int i2c_transfer(struct i2c_msg *msg)
180{
181 int ret = 0;
182 int timeout_count = 10000;
183 int len = msg->len;
184
185 if (!(bfin_read_TWI_CONTROL() & TWI_ENA)) {
186 ret = -5;
187 goto transfer_error;
188 }
189
190 while (bfin_read_TWI_MASTER_STAT() & BUSBUSY) ;
191
192 /* Set Transmit device address */
193 bfin_write_TWI_MASTER_ADDR(msg->addr);
194
195 /*
196 * FIFO Initiation.
197 * Data in FIFO should be discarded before start a new operation.
198 */
199 bfin_write_TWI_FIFO_CTL(0x3);
200 sync();
201 bfin_write_TWI_FIFO_CTL(0);
202 sync();
203
204 if (!(msg->flags & I2C_M_RD)) {
205 /* Transmit first data */
206 if (msg->len > 0) {
207 PRINTD("1 in i2c_transfer: buf=%d, len=%d\n", *msg->buf,
208 len);
209 bfin_write_TWI_XMT_DATA8(*(msg->buf++));
210 msg->len--;
211 sync();
212 }
213 }
214
215 /* clear int stat */
216 bfin_write_TWI_INT_STAT(MERR | MCOMP | XMTSERV | RCVSERV);
217
218 /* Interrupt mask . Enable XMT, RCV interrupt */
219 bfin_write_TWI_INT_MASK(MCOMP | MERR |
220 ((msg->flags & I2C_M_RD) ? RCVSERV : XMTSERV));
221 sync();
222
223 if (len > 0 && len <= 255)
224 bfin_write_TWI_MASTER_CTL((len << 6));
225 else if (msg->len > 255) {
226 bfin_write_TWI_MASTER_CTL((0xff << 6));
227 msg->flags &= I2C_M_STOP;
228 } else
229 bfin_write_TWI_MASTER_CTL(0);
230
231 /* Master enable */
232 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() | MEN |
233 ((msg->flags & I2C_M_RD)
234 ? MDIR : 0) | ((CONFIG_TWICLK_KHZ >
235 100) ? FAST : 0));
236 sync();
237
238 ret = wait_for_completion(msg, timeout_count);
239 PRINTD("3 in i2c_transfer: ret=%d\n", ret);
240
241transfer_error:
242 switch (ret) {
243 case 1:
244 PRINTD(("i2c_transfer: error: transfer fail\n"));
245 break;
246 case 2:
247 PRINTD(("i2c_transfer: error: transmit timeout\n"));
248 break;
249 case 3:
250 PRINTD(("i2c_transfer: error: ACK missing\n"));
251 break;
252 case 4:
253 PRINTD(("i2c_transfer: error: receive timeout\n"));
254 break;
255 case 5:
256 PRINTD(("i2c_transfer: error: controller not ready\n"));
257 i2c_reset();
258 break;
259 default:
260 break;
261 }
262 return ret;
263
264}
265
266/* ---------------------------------------------------------------------*/
267/* API Functions */
268/* ---------------------------------------------------------------------*/
269
270void i2c_init(int speed, int slaveaddr)
271{
272 i2c_reset();
273}
274
275/**
276 * i2c_probe: - Test if a chip answers for a given i2c address
277 *
278 * @chip: address of the chip which is searched for
279 * @return: 0 if a chip was found, -1 otherwhise
280 */
281
282int i2c_probe(uchar chip)
283{
284 struct i2c_msg msg;
285 u8 probebuf;
286
287 i2c_reset();
288
289 probebuf = 0;
290 msg.addr = chip;
291 msg.flags = 0;
292 msg.len = 1;
293 msg.buf = &probebuf;
294 if (i2c_transfer(&msg))
295 return -1;
296
297 msg.addr = chip;
298 msg.flags = I2C_M_RD;
299 msg.len = 1;
300 msg.buf = &probebuf;
301 if (i2c_transfer(&msg))
302 return -1;
303
304 return 0;
305}
306
307/**
308 * i2c_read: - Read multiple bytes from an i2c device
309 *
310 * chip: I2C chip address, range 0..127
311 * addr: Memory (register) address within the chip
312 * alen: Number of bytes to use for addr (typically 1, 2 for larger
313 * memories, 0 for register type devices with only one
314 * register)
315 * buffer: Where to read/write the data
316 * len: How many bytes to read/write
317 *
318 * Returns: 0 on success, not 0 on failure
319 */
320
321int i2c_read(uchar chip, uint addr, int alen, uchar * buffer, int len)
322{
323 struct i2c_msg msg;
324 u8 addr_bytes[3]; /* lowest...highest byte of data address */
325
326 PRINTD("i2c_read: chip=0x%x, addr=0x%x, alen=0x%x, len=0x%x\n", chip,
327 addr, alen, len);
328
329 if (alen > 0) {
330 addr_bytes[0] = (u8) ((addr >> 0) & 0x000000FF);
331 addr_bytes[1] = (u8) ((addr >> 8) & 0x000000FF);
332 addr_bytes[2] = (u8) ((addr >> 16) & 0x000000FF);
333 msg.addr = chip;
334 msg.flags = 0;
335 msg.len = alen;
336 msg.buf = addr_bytes;
337 if (i2c_transfer(&msg))
338 return -1;
339 }
340
341 /* start read sequence */
342 PRINTD(("i2c_read: start read sequence\n"));
343 msg.addr = chip;
344 msg.flags = I2C_M_RD;
345 msg.len = len;
346 msg.buf = buffer;
347 if (i2c_transfer(&msg))
348 return -1;
349
350 return 0;
351}
352
353/**
354 * i2c_write: - Write multiple bytes to an i2c device
355 *
356 * chip: I2C chip address, range 0..127
357 * addr: Memory (register) address within the chip
358 * alen: Number of bytes to use for addr (typically 1, 2 for larger
359 * memories, 0 for register type devices with only one
360 * register)
361 * buffer: Where to read/write the data
362 * len: How many bytes to read/write
363 *
364 * Returns: 0 on success, not 0 on failure
365 */
366
367int i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len)
368{
369 struct i2c_msg msg;
370 u8 addr_bytes[3]; /* lowest...highest byte of data address */
371
372 PRINTD
373 ("i2c_write: chip=0x%x, addr=0x%x, alen=0x%x, len=0x%x, buf0=0x%x\n",
374 chip, addr, alen, len, buffer[0]);
375
376 /* chip address write */
377 if (alen > 0) {
378 addr_bytes[0] = (u8) ((addr >> 0) & 0x000000FF);
379 addr_bytes[1] = (u8) ((addr >> 8) & 0x000000FF);
380 addr_bytes[2] = (u8) ((addr >> 16) & 0x000000FF);
381 msg.addr = chip;
382 msg.flags = 0;
383 msg.len = alen;
384 msg.buf = addr_bytes;
385 if (i2c_transfer(&msg))
386 return -1;
387 }
388
389 /* start read sequence */
390 PRINTD(("i2c_write: start write sequence\n"));
391 msg.addr = chip;
392 msg.flags = 0;
393 msg.len = len;
394 msg.buf = buffer;
395 if (i2c_transfer(&msg))
396 return -1;
397
398 return 0;
399
400}
401
402uchar i2c_reg_read(uchar chip, uchar reg)
403{
404 uchar buf;
405
406 PRINTD("i2c_reg_read: chip=0x%02x, reg=0x%02x\n", chip, reg);
407 i2c_read(chip, reg, 0, &buf, 1);
408 return (buf);
409}
410
411void i2c_reg_write(uchar chip, uchar reg, uchar val)
412{
413 PRINTD("i2c_reg_write: chip=0x%02x, reg=0x%02x, val=0x%02x\n", chip,
414 reg, val);
415 i2c_write(chip, reg, 0, &val, 1);
416}
417
418#endif /* CONFIG_HARD_I2C */