Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2016 Stefan Roese <sr@denx.de> |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 4 | */ |
| 5 | |
Stefan Roese | 633fa0e | 2016-10-25 10:56:19 +0200 | [diff] [blame] | 6 | #ifndef _CONFIG_MVEBU_ARMADA_8K_H |
| 7 | #define _CONFIG_MVEBU_ARMADA_8K_H |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 8 | |
| 9 | /* |
| 10 | * High Level Configuration Options (easy to change) |
| 11 | */ |
| 12 | #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ |
| 13 | |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 14 | /* additions for new ARM relocation support */ |
| 15 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
| 16 | |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 17 | /* auto boot */ |
| 18 | #define CONFIG_PREBOOT |
| 19 | |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 20 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ |
| 21 | 115200, 230400, 460800, 921600 } |
| 22 | |
| 23 | /* |
| 24 | * For booting Linux, the board info and command line data |
| 25 | * have to be in the first 8 MB of memory, since this is |
| 26 | * the maximum mapped by the Linux kernel during initialization. |
| 27 | */ |
| 28 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
| 29 | #define CONFIG_INITRD_TAG /* enable INITRD tag */ |
| 30 | #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ |
| 31 | |
| 32 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 33 | |
| 34 | /* |
| 35 | * Size of malloc() pool |
| 36 | */ |
| 37 | #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */ |
| 38 | |
| 39 | /* |
| 40 | * Other required minimal configurations |
| 41 | */ |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 42 | #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 43 | #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ |
| 44 | #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ |
| 45 | #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ |
| 46 | #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ |
| 47 | #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
| 48 | |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 49 | /* End of 16M scrubbed by training in bootrom */ |
| 50 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000) |
| 51 | |
| 52 | /* |
| 53 | * SPI Flash configuration |
| 54 | */ |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 55 | #define CONFIG_ENV_SPI_BUS 0 |
| 56 | #define CONFIG_ENV_SPI_CS 0 |
| 57 | |
| 58 | /* SPI NOR flash default params, used by sf commands */ |
| 59 | #define CONFIG_SF_DEFAULT_SPEED 1000000 |
| 60 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 |
| 61 | #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE |
| 62 | |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 63 | #define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */ |
| 64 | #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ |
| 65 | #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ |
| 66 | |
Konstantin Porotchkin | f59472e | 2017-04-05 18:22:33 +0300 | [diff] [blame] | 67 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 68 | #define CONFIG_SYS_NAND_MAX_CHIPS 1 |
| 69 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
| 70 | #define CONFIG_SYS_NAND_USE_FLASH_BBT |
| 71 | |
Stefan Roese | def8442 | 2017-02-20 12:25:26 +0100 | [diff] [blame] | 72 | /* |
| 73 | * Ethernet Driver configuration |
| 74 | */ |
| 75 | #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ |
Stefan Roese | def8442 | 2017-02-20 12:25:26 +0100 | [diff] [blame] | 76 | #define CONFIG_ARP_TIMEOUT 200 |
| 77 | #define CONFIG_NET_RETRY_COUNT 50 |
| 78 | |
Bin Meng | cbb89ed | 2017-07-19 21:50:06 +0800 | [diff] [blame] | 79 | #define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3) |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 80 | |
| 81 | /* USB ethernet */ |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 82 | |
| 83 | /* |
| 84 | * SATA/SCSI/AHCI configuration |
| 85 | */ |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 86 | #define CONFIG_SCSI_AHCI_PLAT |
Stefan Roese | 6f8c2d4 | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 87 | #define CONFIG_LBA48 |
| 88 | #define CONFIG_SYS_64BIT_LBA |
| 89 | |
| 90 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 |
| 91 | #define CONFIG_SYS_SCSI_MAX_LUN 1 |
| 92 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ |
| 93 | CONFIG_SYS_SCSI_MAX_LUN) |
| 94 | |
Stefan Roese | 1ec5aa6 | 2016-10-27 13:36:45 +0200 | [diff] [blame] | 95 | /* |
| 96 | * PCI configuration |
| 97 | */ |
| 98 | #ifdef CONFIG_PCIE_DW_MVEBU |
| 99 | #define CONFIG_E1000 |
Stefan Roese | 1ec5aa6 | 2016-10-27 13:36:45 +0200 | [diff] [blame] | 100 | #endif |
| 101 | |
Mark Kettenis | bdca661 | 2018-03-17 09:34:27 +0100 | [diff] [blame] | 102 | #define BOOT_TARGET_DEVICES(func) \ |
| 103 | func(MMC, mmc, 1) \ |
| 104 | func(MMC, mmc, 0) \ |
| 105 | func(USB, usb, 0) \ |
| 106 | func(SCSI, scsi, 0) \ |
| 107 | func(PXE, pxe, na) \ |
| 108 | func(DHCP, dhcp, na) |
| 109 | |
| 110 | #include <config_distro_bootcmd.h> |
| 111 | |
| 112 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 113 | "scriptaddr=0x4d00000\0" \ |
| 114 | "pxefile_addr_r=0x4e00000\0" \ |
| 115 | "fdt_addr_r=0x4f00000\0" \ |
| 116 | "kernel_addr_r=0x5000000\0" \ |
| 117 | "ramdisk_addr_r=0x8000000\0" \ |
| 118 | "fdtfile=marvell/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ |
| 119 | BOOTENV |
| 120 | |
Stefan Roese | 633fa0e | 2016-10-25 10:56:19 +0200 | [diff] [blame] | 121 | #endif /* _CONFIG_MVEBU_ARMADA_8K_H */ |