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Michal Simek051a8ad2018-03-27 13:43:05 +02001// SPDX-License-Identifier: GPL-2.0+
Michal Simek6d6e3db2015-07-22 11:39:04 +02002/*
3 * Xilinx ZC770 XM013 board DTS
4 *
Michal Simek051a8ad2018-03-27 13:43:05 +02005 * Copyright (C) 2013-2018 Xilinx, Inc.
Michal Simek6d6e3db2015-07-22 11:39:04 +02006 */
7/dts-v1/;
8#include "zynq-7000.dtsi"
Michal Simekb347c142016-04-07 15:24:08 +02009
Michal Simek6d6e3db2015-07-22 11:39:04 +020010/ {
Luis Araneda9896dc62018-07-12 00:10:20 -040011 model = "Xilinx ZC770 XM011 board";
Michal Simek6d6e3db2015-07-22 11:39:04 +020012 compatible = "xlnx,zynq-zc770-xm011", "xlnx,zynq-7000";
Michal Simek6d6e3db2015-07-22 11:39:04 +020013
14 aliases {
15 i2c0 = &i2c1;
16 serial0 = &uart1;
17 spi0 = &spi0;
18 };
19
20 chosen {
Michal Simek936bbc52016-04-07 11:15:00 +020021 bootargs = "";
Michal Simek46919412016-01-12 13:56:44 +010022 stdout-path = "serial0:115200n8";
Michal Simek6d6e3db2015-07-22 11:39:04 +020023 };
24
Michal Simekcc7978b2016-11-11 13:11:37 +010025 memory@0 {
Michal Simek6d6e3db2015-07-22 11:39:04 +020026 device_type = "memory";
27 reg = <0x0 0x40000000>;
28 };
29
30 usb_phy1: phy1 {
31 compatible = "usb-nop-xceiv";
32 #phy-cells = <0>;
33 };
34};
35
Michal Simek6d6e3db2015-07-22 11:39:04 +020036&can0 {
37 status = "okay";
38};
39
40&i2c1 {
41 status = "okay";
42 clock-frequency = <400000>;
43
Michal Simek99a2e342018-03-27 13:48:51 +020044 eeprom: eeprom@52 {
45 compatible = "atmel,24c02";
Michal Simek6d6e3db2015-07-22 11:39:04 +020046 reg = <0x52>;
47 };
48};
49
Michal Simek7ebf67a2016-01-14 13:09:16 +010050&spi0 {
51 status = "okay";
52 num-cs = <4>;
53 is-decoded-cs = <0>;
54};
55
Michal Simek6d6e3db2015-07-22 11:39:04 +020056&uart1 {
Simon Glass035c6b22015-10-17 19:41:24 -060057 u-boot,dm-pre-reloc;
Michal Simek6d6e3db2015-07-22 11:39:04 +020058 status = "okay";
59};
60
61&usb1 {
62 status = "okay";
63 dr_mode = "host";
64 usb-phy = <&usb_phy1>;
65};