blob: f06abbca0c210deec791eb36701a074f25f4f703 [file] [log] [blame]
Yoshihiro Shimoda1a2621b2012-11-04 15:53:22 +00001/*
2 * Configuation settings for the sh7752evb board
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Yoshihiro Shimoda1a2621b2012-11-04 15:53:22 +00007 */
8
9#ifndef __SH7752EVB_H
10#define __SH7752EVB_H
11
12#undef DEBUG
Yoshihiro Shimoda1a2621b2012-11-04 15:53:22 +000013#define CONFIG_SH_32BIT 1
14#define CONFIG_CPU_SH7752 1
15#define CONFIG_SH7752EVB 1
16
17#define CONFIG_SYS_TEXT_BASE 0x5ff80000
18#define CONFIG_SYS_LDSCRIPT "board/renesas/sh7752evb/u-boot.lds"
19
20#define CONFIG_CMD_MEMORY
21#define CONFIG_CMD_NET
22#define CONFIG_CMD_MII
23#define CONFIG_CMD_PING
24#define CONFIG_CMD_NFS
25#define CONFIG_CMD_DFL
26#define CONFIG_CMD_SDRAM
27#define CONFIG_CMD_SF
28#define CONFIG_CMD_RUN
29#define CONFIG_CMD_SAVEENV
30#define CONFIG_CMD_MD5SUM
31#define CONFIG_MD5
32#define CONFIG_CMD_LOADS
33#define CONFIG_CMD_MMC
34#define CONFIG_CMD_EXT2
35#define CONFIG_DOS_PARTITION
36#define CONFIG_MAC_PARTITION
37
38#define CONFIG_BAUDRATE 115200
39#define CONFIG_BOOTDELAY 3
40#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
41
42#define CONFIG_VERSION_VARIABLE
43#undef CONFIG_SHOW_BOOT_PROGRESS
44#define CONFIG_CMDLINE_EDITING
45#define CONFIG_AUTO_COMPLETE
46
47/* MEMORY */
48#define SH7752EVB_SDRAM_BASE (0x40000000)
49#define SH7752EVB_SDRAM_SIZE (512 * 1024 * 1024)
50
51#define CONFIG_SYS_LONGHELP
Yoshihiro Shimoda1a2621b2012-11-04 15:53:22 +000052#define CONFIG_SYS_CBSIZE 256
53#define CONFIG_SYS_PBSIZE 256
54#define CONFIG_SYS_MAXARGS 16
55#define CONFIG_SYS_BARGSIZE 512
56#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
57
58/* SCIF */
59#define CONFIG_SCIF_CONSOLE 1
60#define CONFIG_CONS_SCIF2 1
61#undef CONFIG_SYS_CONSOLE_INFO_QUIET
62#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
63#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
64
65#define CONFIG_SYS_MEMTEST_START (SH7752EVB_SDRAM_BASE)
66#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
67 480 * 1024 * 1024)
68#undef CONFIG_SYS_ALT_MEMTEST
69#undef CONFIG_SYS_MEMTEST_SCRATCH
70#undef CONFIG_SYS_LOADS_BAUD_CHANGE
71
72#define CONFIG_SYS_SDRAM_BASE (SH7752EVB_SDRAM_BASE)
73#define CONFIG_SYS_SDRAM_SIZE (SH7752EVB_SDRAM_SIZE)
74#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
75 128 * 1024 * 1024)
76
77#define CONFIG_SYS_MONITOR_BASE 0x00000000
78#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
79#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
80#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
81
82/* FLASH */
83#define CONFIG_SYS_NO_FLASH
84
85/* Ether */
86#define CONFIG_SH_ETHER 1
87#define CONFIG_SH_ETHER_USE_PORT 0
88#define CONFIG_SH_ETHER_PHY_ADDR 18
89#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
90#define CONFIG_SH_ETHER_USE_GETHER 1
91#define CONFIG_PHYLIB
92#define CONFIG_BITBANGMII
93#define CONFIG_BITBANGMII_MULTI
94#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
95#define CONFIG_PHY_VITESSE
96
97#define SH7752EVB_ETHERNET_MAC_BASE_SPI 0x00090000
98#define SH7752EVB_SPI_SECTOR_SIZE (64 * 1024)
99#define SH7752EVB_ETHERNET_MAC_BASE SH7752EVB_ETHERNET_MAC_BASE_SPI
100#define SH7752EVB_ETHERNET_MAC_SIZE 17
101#define SH7752EVB_ETHERNET_NUM_CH 2
102#define CONFIG_BOARD_LATE_INIT
103
104/* SPI */
105#define CONFIG_SH_SPI 1
106#define CONFIG_SH_SPI_BASE 0xfe002000
107#define CONFIG_SPI_FLASH
108#define CONFIG_SPI_FLASH_STMICRO 1
109#define CONFIG_SPI_FLASH_MACRONIX 1
110
111/* MMCIF */
112#define CONFIG_MMC 1
113#define CONFIG_GENERIC_MMC 1
114#define CONFIG_SH_MMCIF 1
115#define CONFIG_SH_MMCIF_ADDR 0xffcb0000
116#define CONFIG_SH_MMCIF_CLK 48000000
117
118/* ENV setting */
119#define CONFIG_ENV_IS_EMBEDDED
120#define CONFIG_ENV_IS_IN_SPI_FLASH
121#define CONFIG_ENV_SECT_SIZE (64 * 1024)
122#define CONFIG_ENV_ADDR (0x00080000)
123#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
124#define CONFIG_ENV_OVERWRITE 1
125#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
126#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
127#define CONFIG_EXTRA_ENV_SETTINGS \
128 "netboot=bootp; bootm\0"
129
130/* Board Clock */
131#define CONFIG_SYS_CLK_FREQ 48000000
Nobuhiro Iwamatsu684a5012013-08-21 16:11:21 +0900132#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
133#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Yoshihiro Shimoda1a2621b2012-11-04 15:53:22 +0000134#define CONFIG_SYS_TMU_CLK_DIV 4
Yoshihiro Shimoda1a2621b2012-11-04 15:53:22 +0000135#endif /* __SH7752EVB_H */