Stefan Roese | c034075 | 2008-11-12 13:30:10 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License as |
| 6 | * published by the Free Software Foundation; either version 2 of |
| 7 | * the License, or (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software |
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 17 | * MA 02111-1307 USA |
| 18 | */ |
| 19 | |
| 20 | #include <config.h> |
| 21 | #include <common.h> |
| 22 | #include <asm/io.h> |
| 23 | |
Stefan Roese | 97cae3a | 2008-12-15 15:40:12 +0100 | [diff] [blame] | 24 | #ifdef CONFIG_VCT_PLATINUMAVC |
| 25 | #define UART_1_BASE 0xBDC30000 |
| 26 | #else |
Stefan Roese | c034075 | 2008-11-12 13:30:10 +0100 | [diff] [blame] | 27 | #define UART_1_BASE 0xBF89C000 |
Stefan Roese | 97cae3a | 2008-12-15 15:40:12 +0100 | [diff] [blame] | 28 | #endif |
Stefan Roese | c034075 | 2008-11-12 13:30:10 +0100 | [diff] [blame] | 29 | |
| 30 | #define UART_RBR_OFF 0x00 /* receiver buffer reg */ |
| 31 | #define UART_THR_OFF 0x00 /* transmit holding reg */ |
| 32 | #define UART_DLL_OFF 0x00 /* divisor latch low reg */ |
| 33 | #define UART_IER_OFF 0x04 /* interrupt enable reg */ |
| 34 | #define UART_DLH_OFF 0x04 /* receiver buffer reg */ |
| 35 | #define UART_FCR_OFF 0x08 /* fifo control register */ |
| 36 | #define UART_LCR_OFF 0x0c /* line control register */ |
| 37 | #define UART_MCR_OFF 0x10 /* modem control register */ |
| 38 | #define UART_LSR_OFF 0x14 /* line status register */ |
| 39 | #define UART_MSR_OFF 0x18 /* modem status register */ |
| 40 | #define UART_SCR_OFF 0x1c /* scratch pad register */ |
| 41 | |
| 42 | #define UART_RCV_DATA_RDY 0x01 /* Data Received */ |
| 43 | #define UART_XMT_HOLD_EMPTY 0x20 |
| 44 | #define UART_TRANSMIT_EMPTY 0x40 |
| 45 | |
| 46 | /* 7 bit on line control reg. enalbing rw to dll and dlh */ |
| 47 | #define UART_LCR_DLAB 0x0080 |
| 48 | |
| 49 | #define UART___9600_BDR 0x84 |
| 50 | #define UART__19200_BDR 0x42 |
| 51 | #define UART_115200_BDR 0x08 |
| 52 | |
| 53 | #define UART_DIS_ALL_INTER 0x00 /* disable all interrupts */ |
| 54 | |
| 55 | #define UART_5DATA_BITS 0x0000 /* 5 [bits] 1.5 bits 2 */ |
| 56 | #define UART_6DATA_BITS 0x0001 /* 6 [bits] 1 bits 2 */ |
| 57 | #define UART_7DATA_BITS 0x0002 /* 7 [bits] 1 bits 2 */ |
| 58 | #define UART_8DATA_BITS 0x0003 /* 8 [bits] 1 bits 2 */ |
| 59 | |
Stefan Roese | 97cae3a | 2008-12-15 15:40:12 +0100 | [diff] [blame] | 60 | static void vct_uart_set_baud_rate(u32 address, u32 dh, u32 dl) |
Stefan Roese | c034075 | 2008-11-12 13:30:10 +0100 | [diff] [blame] | 61 | { |
| 62 | u32 val = __raw_readl(UART_1_BASE + UART_LCR_OFF); |
| 63 | |
| 64 | /* set 7 bit on 1 */ |
| 65 | val |= UART_LCR_DLAB; |
| 66 | __raw_writel(val, UART_1_BASE + UART_LCR_OFF); |
| 67 | |
| 68 | __raw_writel(dl, UART_1_BASE + UART_DLL_OFF); |
| 69 | __raw_writel(dh, UART_1_BASE + UART_DLH_OFF); |
| 70 | |
| 71 | /* set 7 bit on 0 */ |
| 72 | val &= ~UART_LCR_DLAB; |
| 73 | __raw_writel(val, UART_1_BASE + UART_LCR_OFF); |
| 74 | |
| 75 | return; |
| 76 | } |
| 77 | |
| 78 | int serial_init(void) |
| 79 | { |
| 80 | __raw_writel(UART_DIS_ALL_INTER, UART_1_BASE + UART_IER_OFF); |
Stefan Roese | 97cae3a | 2008-12-15 15:40:12 +0100 | [diff] [blame] | 81 | vct_uart_set_baud_rate(UART_1_BASE, 0, UART_115200_BDR); |
Stefan Roese | c034075 | 2008-11-12 13:30:10 +0100 | [diff] [blame] | 82 | __raw_writel(UART_8DATA_BITS, UART_1_BASE + UART_LCR_OFF); |
| 83 | |
| 84 | return 0; |
| 85 | } |
| 86 | |
| 87 | void serial_setbrg(void) |
| 88 | { |
| 89 | /* |
| 90 | * Baudrate change not supported currently, fixed to 115200 baud |
| 91 | */ |
| 92 | } |
| 93 | |
| 94 | void serial_putc(const char c) |
| 95 | { |
| 96 | if (c == '\n') |
| 97 | serial_putc('\r'); |
| 98 | |
| 99 | while (!(UART_XMT_HOLD_EMPTY & __raw_readl(UART_1_BASE + UART_LSR_OFF))) |
| 100 | ; |
| 101 | |
| 102 | __raw_writel(c, UART_1_BASE + UART_THR_OFF); |
| 103 | } |
| 104 | |
| 105 | void serial_puts(const char *s) |
| 106 | { |
| 107 | while (*s) |
| 108 | serial_putc(*s++); |
| 109 | } |
| 110 | |
| 111 | int serial_getc(void) |
| 112 | { |
| 113 | while (!(UART_RCV_DATA_RDY & __raw_readl(UART_1_BASE + UART_LSR_OFF))) |
| 114 | ; |
| 115 | |
| 116 | return __raw_readl(UART_1_BASE + UART_RBR_OFF) & 0xff; |
| 117 | } |
| 118 | |
| 119 | int serial_tstc(void) |
| 120 | { |
| 121 | if (!(UART_RCV_DATA_RDY & __raw_readl(UART_1_BASE + UART_LSR_OFF))) |
| 122 | return 0; |
| 123 | |
| 124 | return 1; |
| 125 | } |