blob: 82351b66137050ec0f836e67e415d293672f3f5b [file] [log] [blame]
Tom Rini4549e782018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay5d0c74e2018-03-12 10:46:12 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay5d0c74e2018-03-12 10:46:12 +01004 */
5
6#include <common.h>
7#include <dm.h>
8#include <errno.h>
9#include <i2c.h>
10#include <power/pmic.h>
11#include <power/stpmu1.h>
12
13#define STMPU1_NUM_OF_REGS 0x100
14
Patrice Chotard1f0dfa12018-04-26 17:13:10 +020015#ifndef CONFIG_SPL_BUILD
16static const struct pmic_child_info stpmu1_children_info[] = {
17 { .prefix = "ldo", .driver = "stpmu1_ldo" },
18 { .prefix = "buck", .driver = "stpmu1_buck" },
19 { .prefix = "vref_ddr", .driver = "stpmu1_vref_ddr" },
20 { .prefix = "pwr_sw", .driver = "stpmu1_pwr_sw" },
21 { .prefix = "boost", .driver = "stpmu1_boost" },
22 { },
23};
24#endif /* CONFIG_SPL_BUILD */
25
Patrick Delaunay5d0c74e2018-03-12 10:46:12 +010026static int stpmu1_reg_count(struct udevice *dev)
27{
28 return STMPU1_NUM_OF_REGS;
29}
30
31static int stpmu1_write(struct udevice *dev, uint reg, const uint8_t *buff,
32 int len)
33{
34 int ret;
35
36 ret = dm_i2c_write(dev, reg, buff, len);
37 if (ret)
38 dev_err(dev, "%s: failed to write register %#x :%d",
39 __func__, reg, ret);
40
41 return ret;
42}
43
44static int stpmu1_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
45{
46 int ret;
47
48 ret = dm_i2c_read(dev, reg, buff, len);
49 if (ret)
50 dev_err(dev, "%s: failed to read register %#x : %d",
51 __func__, reg, ret);
52
53 return ret;
54}
55
Patrice Chotard1f0dfa12018-04-26 17:13:10 +020056static int stpmu1_bind(struct udevice *dev)
57{
58#ifndef CONFIG_SPL_BUILD
59 ofnode regulators_node;
60 int children;
61
62 regulators_node = dev_read_subnode(dev, "regulators");
63 if (!ofnode_valid(regulators_node)) {
64 dev_dbg(dev, "regulators subnode not found!");
65 return -ENXIO;
66 }
67 dev_dbg(dev, "found regulators subnode\n");
68
69 children = pmic_bind_children(dev, regulators_node,
70 stpmu1_children_info);
71 if (!children)
72 dev_dbg(dev, "no child found\n");
73#endif /* CONFIG_SPL_BUILD */
74
75 return 0;
76}
77
Patrick Delaunay5d0c74e2018-03-12 10:46:12 +010078static struct dm_pmic_ops stpmu1_ops = {
79 .reg_count = stpmu1_reg_count,
80 .read = stpmu1_read,
81 .write = stpmu1_write,
82};
83
84static const struct udevice_id stpmu1_ids[] = {
85 { .compatible = "st,stpmu1" },
86 { }
87};
88
89U_BOOT_DRIVER(pmic_stpmu1) = {
90 .name = "stpmu1_pmic",
91 .id = UCLASS_PMIC,
92 .of_match = stpmu1_ids,
Patrice Chotard1f0dfa12018-04-26 17:13:10 +020093 .bind = stpmu1_bind,
Patrick Delaunay5d0c74e2018-03-12 10:46:12 +010094 .ops = &stpmu1_ops,
95};