| Stefan Roese | 5568e61 | 2005-11-22 13:20:42 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2005 |
| 3 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
| 4 | * |
| 5 | * Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com> |
| 6 | * |
| Wolfgang Denk | 3765b3e | 2013-10-07 13:07:26 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
| Stefan Roese | 5568e61 | 2005-11-22 13:20:42 +0100 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #include <ppc_asm.tmpl> |
| Stefan Roese | cf6eb6d | 2010-04-14 13:57:18 +0200 | [diff] [blame] | 11 | #include <asm/mmu.h> |
| Stefan Roese | 5568e61 | 2005-11-22 13:20:42 +0100 | [diff] [blame] | 12 | #include <config.h> |
| Stefan Roese | 550650d | 2010-09-20 16:05:31 +0200 | [diff] [blame] | 13 | #include <asm/ppc4xx.h> |
| Stefan Roese | 5568e61 | 2005-11-22 13:20:42 +0100 | [diff] [blame] | 14 | |
| Stefan Roese | 5568e61 | 2005-11-22 13:20:42 +0100 | [diff] [blame] | 15 | /************************************************************************** |
| 16 | * TLB TABLE |
| 17 | * |
| 18 | * This table is used by the cpu boot code to setup the initial tlb |
| 19 | * entries. Rather than make broad assumptions in the cpu source tree, |
| 20 | * this table lets each board set things up however they like. |
| 21 | * |
| 22 | * Pointer to the table is returned in r1 |
| 23 | * |
| 24 | *************************************************************************/ |
| 25 | |
| 26 | .section .bootpg,"ax" |
| 27 | .globl tlbtab |
| 28 | |
| 29 | tlbtab: |
| 30 | tlbtab_start |
| Stefan Roese | cf6eb6d | 2010-04-14 13:57:18 +0200 | [diff] [blame] | 31 | tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG) |
| 32 | tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG) |
| 33 | tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_RWX ) |
| 34 | tlbentry( CONFIG_SYS_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_RWX ) |
| 35 | tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_IG ) |
| 36 | tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG ) |
| 37 | tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG ) |
| Stefan Roese | 5568e61 | 2005-11-22 13:20:42 +0100 | [diff] [blame] | 38 | tlbtab_end |