Blame - arch/arm/mach-mvebu/Kconfig - platform/external/u-boot

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Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	1	if ARCH_MVEBU
				2
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	3	config HAVE_MVEBU_EFUSE
				4	bool
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	5
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	6	config ARMADA_32BIT
				7	bool
Michal Simek	58008cb	2018-07-23 15:55:15 +0200	[diff] [blame]	8	select BOARD_EARLY_INIT_F
Lokesh Vutla	acf1500	2018-04-26 18:21:26 +0530	[diff] [blame]	9	select CPU_V7A
Stefan Roese	237b629	2019-04-11 08:58:32 +0200	[diff] [blame]	10	select SPL_DM if SPL
				11	select SPL_DM_SEQ_ALIAS if SPL
				12	select SPL_OF_CONTROL if SPL
Tom Rini	7609e02	2021-10-15 10:54:41 -0400	[diff] [blame]	13	select SPL_SKIP_LOWLEVEL_INIT if SPL
Stefan Roese	237b629	2019-04-11 08:58:32 +0200	[diff] [blame]	14	select SPL_SIMPLE_BUS if SPL
Michal Simek	58008cb	2018-07-23 15:55:15 +0200	[diff] [blame]	15	select SUPPORT_SPL
Philip Oberfichtner	1116888	2022-08-17 15:07:12 +0200	[diff] [blame]	16	select SYS_L2_PL310 if !SYS_L2CACHE_OFF
Stefan Roese	f2100f6	2019-04-12 16:42:28 +0200	[diff] [blame]	17	select TRANSLATION_OFFSET
Pali Rohár	2975bba	2022-04-06 16:20:20 +0200	[diff] [blame]	18	select SPL_SYS_NO_VECTOR_TABLE if SPL
Pali Rohár	5bb2c55	2022-05-06 11:05:14 +0200	[diff] [blame]	19	select ARCH_VERY_EARLY_INIT
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	20
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	21	# ARMv7 SoCs...
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	22	config ARMADA_375
				23	bool
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	24	select ARMADA_32BIT
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	25
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	26	config ARMADA_38X
				27	bool
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	28	select ARMADA_32BIT
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	29	select HAVE_MVEBU_EFUSE
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	30
Joshua Scott	28f0cbc	2020-11-09 10:14:08 +1300	[diff] [blame]	31	config ARMADA_38X_HS_IMPEDANCE_THRESH
				32	hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)"
				33	depends on ARMADA_38X
				34	default 0x6
				35	range 0x0 0x7
				36
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	37	config ARMADA_XP
				38	bool
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	39	select ARMADA_32BIT
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	40
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	41	# ARMv8 SoCs...
				42	config ARMADA_3700
				43	bool
				44	select ARM64
Pali Rohár	10154b8	2022-02-23 14:15:45 +0100	[diff] [blame]	45	select HAVE_MVEBU_EFUSE
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	46
Stefan Roese	21b29fc	2016-05-25 08:13:45 +0200	[diff] [blame]	47	# Armada 7K and 8K are very similar - use only one Kconfig symbol for both
				48	config ARMADA_8K
				49	bool
				50	select ARM64
				51
Chris Packham	7d7bb99	2022-11-05 17:23:59 +1300	[diff] [blame]	52	config ALLEYCAT_5
				53	bool
				54	select ARM64
				55
Chris Packham	a53d97a	2016-10-26 14:08:30 +1300	[diff] [blame]	56	# Armada PLL frequency (used for NAND clock generation)
				57	config SYS_MVEBU_PLL_CLOCK
				58	int
Chris Packham	0d0df46	2019-04-11 22:22:50 +1200	[diff] [blame]	59	default "2000000000" if ARMADA_XP \|\| ARMADA_3700 \|\| ARMADA_8K \|\| ARMADA_MSYS
Chris Packham	a53d97a	2016-10-26 14:08:30 +1300	[diff] [blame]	60	default "1000000000" if ARMADA_38X \|\| ARMADA_375
				61
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	62	# Armada XP/38x SoC types...
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	63	config MV78230
				64	bool
				65	select ARMADA_XP
				66
				67	config MV78260
				68	bool
				69	select ARMADA_XP
Simon Glass	3bf926c	2017-06-14 21:28:24 -0600	[diff] [blame]	70	imply CMD_SATA
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	71
				72	config MV78460
				73	bool
				74	select ARMADA_XP
				75
Chris Packham	0d0df46	2019-04-11 22:22:50 +1200	[diff] [blame]	76	config ARMADA_MSYS
				77	bool
				78	select ARMADA_32BIT
				79
				80	config 98DX4251
				81	bool
				82	select ARMADA_MSYS
				83
				84	config 98DX3336
				85	bool
				86	select ARMADA_MSYS
				87
				88	config 98DX3236
				89	bool
				90	select ARMADA_MSYS
				91
Chris Packham	53d601f	2016-09-22 12:56:13 +1200	[diff] [blame]	92	config 88F6820
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	93	bool
				94	select ARMADA_38X
				95
Tom Rini	53dbf11	2022-03-30 18:07:24 -0400	[diff] [blame]	96	config CUSTOMER_BOARD_SUPPORT
				97	bool
				98
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	99	config DDR4
				100	bool "Support Marvell DDR4 Training driver"
				101
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	102	choice
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	103	prompt "Armada XP/375/38x/3700/7K/8K/Alleycat-5 board select"
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	104	optional
				105
Stefan Roese	0299c90	2015-10-20 15:14:47 +0200	[diff] [blame]	106	config TARGET_CLEARFOG
				107	bool "Support ClearFog"
Chris Packham	53d601f	2016-09-22 12:56:13 +1200	[diff] [blame]	108	select 88F6820
Baruch Siach	867572f	2020-01-20 14:20:13 +0200	[diff] [blame]	109	select BOARD_LATE_INIT
Martin Rowe	c733fe9	2023-03-27 21:24:09 +1000	[diff] [blame]	110	select OF_BOARD_SETUP
Stefan Roese	0299c90	2015-10-20 15:14:47 +0200	[diff] [blame]	111
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	112	config TARGET_HELIOS4
				113	bool "Support Helios4"
				114	select 88F6820
				115
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	116	config TARGET_MVEBU_ARMADA_37XX
				117	bool "Support Armada 37xx platforms"
Stefan Roese	01e62c7	2016-05-17 15:04:16 +0200	[diff] [blame]	118	select ARMADA_3700
Simon Glass	fedb428	2017-06-14 21:28:21 -0600	[diff] [blame]	119	imply SCSI
Stefan Roese	01e62c7	2016-05-17 15:04:16 +0200	[diff] [blame]	120
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	121	config TARGET_DB_88F6720
				122	bool "Support DB-88F6720 Armada 375"
				123	select ARMADA_375
				124
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	125	config TARGET_DB_88F6820_GP
				126	bool "Support DB-88F6820-GP"
Chris Packham	53d601f	2016-09-22 12:56:13 +1200	[diff] [blame]	127	select 88F6820
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	128
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	129	config TARGET_DB_88F6820_AMC
				130	bool "Support DB-88F6820-AMC"
				131	select 88F6820
				132
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	133	config TARGET_TURRIS_OMNIA
				134	bool "Support Turris Omnia"
				135	select 88F6820
Marek Behún	539f024	2019-05-02 16:53:37 +0200	[diff] [blame]	136	select BOARD_LATE_INIT
Marek Behún	8420edc	2019-05-02 16:53:28 +0200	[diff] [blame]	137	select DM_I2C
				138	select I2C_MUX
				139	select I2C_MUX_PCA954x
Marek Behún	6d7bfb6	2021-10-09 19:33:46 +0200	[diff] [blame]	140	select SPL_DRIVERS_MISC
Marek Behún	8420edc	2019-05-02 16:53:28 +0200	[diff] [blame]	141	select SPL_I2C_MUX
Marek Behún	2c8a4e4	2021-10-09 19:33:45 +0200	[diff] [blame]	142	select SPL_SYS_MALLOC_SIMPLE
Marek Behún	8420edc	2019-05-02 16:53:28 +0200	[diff] [blame]	143	select SYS_I2C_MVTWSI
Marek Behún	6b26f3e	2019-05-02 16:53:32 +0200	[diff] [blame]	144	select ATSHA204A
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	145
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	146	config TARGET_TURRIS_MOX
				147	bool "Support Turris Mox"
				148	select ARMADA_3700
				149
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	150	config TARGET_MVEBU_ARMADA_8K
				151	bool "Support Armada 7k/8k platforms"
Stefan Roese	6f8c2d4	2016-05-25 08:21:21 +0200	[diff] [blame]	152	select ARMADA_8K
Tom Rini	e5ec481	2017-01-22 19:43:11 -0500	[diff] [blame]	153	select BOARD_LATE_INIT
Simon Glass	fedb428	2017-06-14 21:28:21 -0600	[diff] [blame]	154	imply SCSI
Stefan Roese	6f8c2d4	2016-05-25 08:21:21 +0200	[diff] [blame]	155
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	156	config TARGET_MVEBU_ALLEYCAT5
				157	bool "Support AlleyCat 5 platforms"
				158	select ALLEYCAT_5
				159
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	160	config TARGET_OCTEONTX2_CN913x
				161	bool "Support CN913x platforms"
				162	select ARMADA_8K
				163	imply BOARD_EARLY_INIT_R
				164	select BOARD_LATE_INIT
				165	imply SCSI
				166
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	167	config TARGET_DB_MV784MP_GP
				168	bool "Support db-mv784mp-gp"
Tom Rini	da8592d	2022-02-25 11:19:46 -0500	[diff] [blame]	169	select BOARD_ECC_SUPPORT
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	170	select MV78460
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	171
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	172	config TARGET_DS116
				173	bool "Support Synology DS116"
				174	select 88F6820
				175
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	176	config TARGET_DS414
				177	bool "Support Synology DS414"
				178	select MV78230
				179
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	180	config TARGET_MAXBCM
				181	bool "Support maxbcm"
Tom Rini	da8592d	2022-02-25 11:19:46 -0500	[diff] [blame]	182	select BOARD_ECC_SUPPORT
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	183	select MV78460
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	184
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	185	config TARGET_N2350
				186	bool "Support Thecus N2350"
				187	select 88F6820
				188	select DDR4
				189
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	190	config TARGET_THEADORABLE
				191	bool "Support theadorable Armada XP"
Tom Rini	e5ec481	2017-01-22 19:43:11 -0500	[diff] [blame]	192	select BOARD_LATE_INIT if USB
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	193	select MV78260
Simon Glass	3bf926c	2017-06-14 21:28:24 -0600	[diff] [blame]	194	imply CMD_SATA
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	195
Dirk Eibach	6008326	2017-02-22 16:07:23 +0100	[diff] [blame]	196	config TARGET_CONTROLCENTERDC
				197	bool "Support CONTROLCENTERDC"
				198	select 88F6820
Tom Rini	53dbf11	2022-03-30 18:07:24 -0400	[diff] [blame]	199	select CUSTOMER_BOARD_SUPPORT
Dirk Eibach	6008326	2017-02-22 16:07:23 +0100	[diff] [blame]	200
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	201	config TARGET_X530
				202	bool "Support Allied Telesis x530"
				203	select 88F6820
				204
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	205	config TARGET_DB_XC3_24G4XG
				206	bool "Support DB-XC3-24G4XG"
				207	select 98DX3336
				208
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	209	config TARGET_CRS3XX_98DX3236
				210	bool "Support CRS3XX-98DX3236"
Luka Kovacic	22bb913	2019-05-07 19:35:55 +0200	[diff] [blame]	211	select 98DX3236
				212
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	213	endchoice
				214
Tom Rini	5b527c5	2021-08-21 13:50:13 -0400	[diff] [blame]	215	choice
				216	prompt "DDR bus width"
				217	default DDR_64BIT
				218	depends on ARMADA_XP
				219
				220	config DDR_64BIT
				221	bool "64bit bus width"
				222
				223	config DDR_32BIT
				224	bool "32bit bus width"
				225
				226	endchoice
				227
Tom Rini	f66a3fd	2021-08-21 13:50:15 -0400	[diff] [blame]	228	config DDR_LOG_LEVEL
				229	int "DDR training code log level"
				230	depends on ARMADA_XP
				231	default 0
				232	range 0 3
				233	help
				234	Amount of information provided on error while running the DDR
				235	training code. At level 0, provides an error code in a case of
				236	failure, RL, WL errors and other algorithm failure. At level 1,
				237	provides the D-Unit setup (SPD/Static configuration). At level 2,
				238	provides the windows margin as a results of DQS centeralization.
				239	At level 3, rovides the windows margin of each DQ as a results of
				240	DQS centeralization.
				241
Marek Behún	871ee66	2022-02-17 13:54:42 +0100	[diff] [blame]	242	config DDR_RESET_ON_TRAINING_FAILURE
				243	bool "Reset the board on DDR training failure instead of hanging"
				244	depends on ARMADA_38X \|\| ARMADA_XP
				245	help
				246	If DDR training fails in SPL, reset the board instead of hanging.
				247	Some boards are known to fail DDR training occasionally and an
				248	immediate reset may be preferable to waiting until the board is
				249	reset by watchdog (if there even is one).
				250
				251	Note that if booting via UART and the DDR training fails, the
				252	device will still hang - it doesn't make sense to reset the board
				253	in such a case.
				254
Tom Rini	da8592d	2022-02-25 11:19:46 -0500	[diff] [blame]	255	config BOARD_ECC_SUPPORT
				256	bool
				257
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	258	config SYS_BOARD
				259	default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	260	default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	261	default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	262	default "db-88f6720" if TARGET_DB_88F6720
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	263	default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	264	default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	265	default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	266	default "turris_mox" if TARGET_TURRIS_MOX
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	267	default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	268	default "octeontx2_cn913x" if TARGET_OCTEONTX2_CN913x
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	269	default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	270	default "ds116" if TARGET_DS116
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	271	default "ds414" if TARGET_DS414
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	272	default "maxbcm" if TARGET_MAXBCM
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	273	default "n2350" if TARGET_N2350
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	274	default "theadorable" if TARGET_THEADORABLE
Baruch Siach	d38f04f	2018-06-18 21:56:23 +0300	[diff] [blame]	275	default "a38x" if TARGET_CONTROLCENTERDC
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	276	default "x530" if TARGET_X530
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	277	default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	278	default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	279	default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	280
				281	config SYS_CONFIG_NAME
				282	default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	283	default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	284	default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	285	default "db-88f6720" if TARGET_DB_88F6720
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	286	default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	287	default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	288	default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	289	default "mvebu_armada-8k" if TARGET_OCTEONTX2_CN913x
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	290	default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	291	default "ds116" if TARGET_DS116
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	292	default "ds414" if TARGET_DS414
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	293	default "maxbcm" if TARGET_MAXBCM
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	294	default "n2350" if TARGET_N2350
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	295	default "theadorable" if TARGET_THEADORABLE
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	296	default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	297	default "turris_mox" if TARGET_TURRIS_MOX
Baruch Siach	d38f04f	2018-06-18 21:56:23 +0300	[diff] [blame]	298	default "controlcenterdc" if TARGET_CONTROLCENTERDC
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	299	default "x530" if TARGET_X530
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	300	default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	301	default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	302	default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	303
				304	config SYS_VENDOR
				305	default "Marvell" if TARGET_DB_MV784MP_GP
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	306	default "Marvell" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	307	default "Marvell" if TARGET_DB_88F6720
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	308	default "Marvell" if TARGET_DB_88F6820_GP
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	309	default "Marvell" if TARGET_DB_88F6820_AMC
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	310	default "Marvell" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	311	default "Marvell" if TARGET_OCTEONTX2_CN913x
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	312	default "Marvell" if TARGET_DB_XC3_24G4XG
				313	default "Marvell" if TARGET_MVEBU_DB_88F7040
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	314	default "solidrun" if TARGET_CLEARFOG
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	315	default "kobol" if TARGET_HELIOS4
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	316	default "Synology" if TARGET_DS116
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	317	default "Synology" if TARGET_DS414
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	318	default "thecus" if TARGET_N2350
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	319	default "CZ.NIC" if TARGET_TURRIS_OMNIA
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	320	default "CZ.NIC" if TARGET_TURRIS_MOX
Baruch Siach	d38f04f	2018-06-18 21:56:23 +0300	[diff] [blame]	321	default "gdsys" if TARGET_CONTROLCENTERDC
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	322	default "alliedtelesis" if TARGET_X530
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	323	default "mikrotik" if TARGET_CRS3XX_98DX3236
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	324	default "Marvell" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	325
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	326	config SYS_SOC
				327	default "mvebu"
				328
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	329	choice
Baruch Siach	ad105f5	2018-06-18 21:56:24 +0300	[diff] [blame]	330	prompt "Boot method"
Joel Johnson	ab2f757	2020-04-17 01:19:05 -0600	[diff] [blame]	331	depends on SPL
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	332
Baruch Siach	ad105f5	2018-06-18 21:56:24 +0300	[diff] [blame]	333	config MVEBU_SPL_BOOT_DEVICE_SPI
Pali Rohár	41d52f3	2023-01-10 23:13:01 +0100	[diff] [blame]	334	bool "NOR flash (SPI or parallel)"
Joel Johnson	ab2f757	2020-04-17 01:19:05 -0600	[diff] [blame]	335	imply ENV_IS_IN_SPI_FLASH
Pali Rohár	2226ca1	2021-07-23 11:14:29 +0200	[diff] [blame]	336	imply SPL_DM_SPI
				337	imply SPL_SPI_FLASH_SUPPORT
				338	imply SPL_SPI_LOAD
Simon Glass	ea2ca7e	2021-08-08 12:20:14 -0600	[diff] [blame]	339	imply SPL_SPI
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	340	select SPL_BOOTROM_SUPPORT
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	341
Pali Rohár	67bd615	2023-01-10 22:55:21 +0100	[diff] [blame]	342	config MVEBU_SPL_BOOT_DEVICE_NAND
				343	bool "NAND flash (SPI or parallel)"
				344	select MTD_RAW_NAND
				345	select SPL_BOOTROM_SUPPORT
				346
Baruch Siach	ad105f5	2018-06-18 21:56:24 +0300	[diff] [blame]	347	config MVEBU_SPL_BOOT_DEVICE_MMC
Pali Rohár	41d52f3	2023-01-10 23:13:01 +0100	[diff] [blame]	348	bool "eMMC or SD card"
Joel Johnson	ab2f757	2020-04-17 01:19:05 -0600	[diff] [blame]	349	imply ENV_IS_IN_MMC
				350	# GPIO needed for eMMC/SD card presence detection
Pali Rohár	2226ca1	2021-07-23 11:14:29 +0200	[diff] [blame]	351	imply SPL_DM_GPIO
				352	imply SPL_DM_MMC
				353	imply SPL_GPIO
				354	imply SPL_LIBDISK_SUPPORT
Simon Glass	103c5f1	2021-08-08 12:20:09 -0600	[diff] [blame]	355	imply SPL_MMC
Pali Rohár	2f27db2	2023-01-08 13:31:41 +0100	[diff] [blame]	356	select SUPPORT_EMMC_BOOT if SPL_MMC
Pali Rohár	913d756	2023-01-09 00:52:09 +0100	[diff] [blame]	357	select SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR if SPL_MMC
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	358	select SPL_BOOTROM_SUPPORT
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	359
Baruch Siach	22c6545	2019-05-16 13:03:58 +0300	[diff] [blame]	360	config MVEBU_SPL_BOOT_DEVICE_SATA
				361	bool "SATA"
Simon Glass	f756037	2021-08-08 12:20:17 -0600	[diff] [blame]	362	imply SPL_SATA
Pali Rohár	2226ca1	2021-07-23 11:14:29 +0200	[diff] [blame]	363	imply SPL_LIBDISK_SUPPORT
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	364	select SPL_BOOTROM_SUPPORT
Baruch Siach	22c6545	2019-05-16 13:03:58 +0300	[diff] [blame]	365
Pali Rohár	50afad5	2023-01-10 23:09:15 +0100	[diff] [blame]	366	config MVEBU_SPL_BOOT_DEVICE_PEX
				367	bool "PCI Express"
				368	select SPL_BOOTROM_SUPPORT
				369
Baruch Siach	72c4e67	2018-06-18 21:56:26 +0300	[diff] [blame]	370	config MVEBU_SPL_BOOT_DEVICE_UART
				371	bool "UART"
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	372	select SPL_BOOTROM_SUPPORT
Baruch Siach	72c4e67	2018-06-18 21:56:26 +0300	[diff] [blame]	373
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	374	endchoice
				375
Pali Rohár	67bd615	2023-01-10 22:55:21 +0100	[diff] [blame]	376	config MVEBU_SPL_NAND_BADBLK_LOCATION
				377	hex "NAND Bad block indicator location"
				378	depends on MVEBU_SPL_BOOT_DEVICE_NAND
				379	range 0x0 0x1
				380	help
				381	Value 0x0 = SLC flash = BBI at page 0 or page 1
				382	Value 0x1 = MLC flash = BBI at last page in the block
				383
Pali Rohár	c62af15	2023-03-29 21:25:58 +0200	[diff] [blame^]	384	config MVEBU_SPL_SATA_BLKSZ
				385	int "SATA block size"
				386	depends on MVEBU_SPL_BOOT_DEVICE_SATA
				387	range 512 32768
				388	default 512
				389	help
				390	Block size of the SATA disk in bytes.
				391	Typically 512 bytes for majority of disks
				392	and 4096 bytes for 4K Native disks.
				393
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	394	config MVEBU_EFUSE
				395	bool "Enable eFuse support"
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	396	depends on HAVE_MVEBU_EFUSE
				397	help
				398	Enable support for reading and writing eFuses on mvebu SoCs.
				399
				400	config MVEBU_EFUSE_FAKE
				401	bool "Fake eFuse access (dry run)"
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	402	depends on MVEBU_EFUSE
				403	help
				404	This enables a "dry run" mode where eFuses are not really programmed.
				405	Instead the eFuse accesses are emulated by writing to and reading
				406	from a memory block.
				407	This is can be used for testing prog scripts.
				408
Pali Rohár	8092d1d	2022-09-22 13:43:45 +0200	[diff] [blame]	409	config MVEBU_EFUSE_VHV_GPIO
				410	string "VHV_Enable GPIO name for eFuse programming"
				411	depends on MVEBU_EFUSE && !ARMADA_3700
				412	help
				413	The eFuse programing (burning) phase requires supplying 1.8V to the
				414	device on the VHV power pin, while for normal operation the VHV power
				415	rail must be left unconnected. See Marvell AN-389: ARMADA VHV Power
				416	document (Doc. No. MV-S302545-00 Rev. C, August 2, 2016) for details.
				417	.
				418	This specify VHV_Enable GPIO name used in U-Boot for enabling VHV power.
				419
				420	config MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW
				421	bool "VHV_Enable GPIO is Active Low"
				422	depends on MVEBU_EFUSE_VHV_GPIO != ""
				423
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	424	config SECURED_MODE_IMAGE
				425	bool "Build image for trusted boot"
				426	default false
				427	depends on 88F6820
				428	help
				429	Build an image that employs the ARMADA SoC's trusted boot framework
				430	for securely booting images.
				431
				432	config SECURED_MODE_CSK_INDEX
				433	int "Index of active CSK"
				434	default 0
				435	depends on SECURED_MODE_IMAGE
				436
Tony Dinh	21f6227	2023-03-02 19:27:29 -0800	[diff] [blame]	437	config SF_DEFAULT_SPEED
				438	int "Default speed for SPI flash in Hz"
				439	default 10000000
				440	depends on MVEBU_SPL_BOOT_DEVICE_SPI
				441
				442	config SF_DEFAULT_MODE
				443	hex "Default mode for SPI flash"
				444	default 0x0
				445	depends on MVEBU_SPL_BOOT_DEVICE_SPI
				446
Joel Johnson	9f205d6	2020-03-23 14:21:32 -0600	[diff] [blame]	447	source "board/solidrun/clearfog/Kconfig"
Dennis Gilmore	5a3db5d	2020-12-08 21:07:36 -0600	[diff] [blame]	448	source "board/kobol/helios4/Kconfig"
Joel Johnson	9f205d6	2020-03-23 14:21:32 -0600	[diff] [blame]	449
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	450	endif