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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Patrice Chotardeee20f82017-02-21 13:37:09 +01002/*
Patrice Chotardfb48bc42017-10-23 09:53:57 +02003 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
4 * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
Patrice Chotardeee20f82017-02-21 13:37:09 +01005 */
6
7#include <common.h>
8#include <dm.h>
9#include <mmc.h>
Patrice Chotarddca31662017-09-05 11:04:20 +020010#include <reset-uclass.h>
Patrice Chotardeee20f82017-02-21 13:37:09 +010011#include <sdhci.h>
12#include <asm/arch/sdhci.h>
13
14DECLARE_GLOBAL_DATA_PTR;
15
16struct sti_sdhci_plat {
17 struct mmc_config cfg;
18 struct mmc mmc;
Patrice Chotarddca31662017-09-05 11:04:20 +020019 struct reset_ctl reset;
Patrice Chotard819c6262017-09-05 11:04:18 +020020 int instance;
Patrice Chotardeee20f82017-02-21 13:37:09 +010021};
22
Patrice Chotardeee20f82017-02-21 13:37:09 +010023/**
24 * sti_mmc_core_config: configure the Arasan HC
Patrice Chotard819c6262017-09-05 11:04:18 +020025 * @dev : udevice
26 *
Patrice Chotardeee20f82017-02-21 13:37:09 +010027 * Description: this function is to configure the Arasan MMC HC.
28 * This should be called when the system starts in case of, on the SoC,
29 * it is needed to configure the host controller.
30 * This happens on some SoCs, i.e. StiH410, where the MMC0 inside the flashSS
31 * needs to be configured as MMC 4.5 to have full capabilities.
32 * W/o these settings the SDHCI could configure and use the embedded controller
33 * with limited features.
34 */
Patrice Chotarddca31662017-09-05 11:04:20 +020035static int sti_mmc_core_config(struct udevice *dev)
Patrice Chotardeee20f82017-02-21 13:37:09 +010036{
Patrice Chotard819c6262017-09-05 11:04:18 +020037 struct sti_sdhci_plat *plat = dev_get_platdata(dev);
38 struct sdhci_host *host = dev_get_priv(dev);
Patrice Chotarddca31662017-09-05 11:04:20 +020039 int ret;
Patrice Chotardeee20f82017-02-21 13:37:09 +010040
41 /* only MMC1 has a reset line */
Patrice Chotard819c6262017-09-05 11:04:18 +020042 if (plat->instance) {
Patrice Chotarddca31662017-09-05 11:04:20 +020043 ret = reset_deassert(&plat->reset);
44 if (ret < 0) {
Masahiro Yamada9b643e32017-09-16 14:10:41 +090045 pr_err("MMC1 deassert failed: %d", ret);
Patrice Chotarddca31662017-09-05 11:04:20 +020046 return ret;
47 }
Patrice Chotardeee20f82017-02-21 13:37:09 +010048 }
49
50 writel(STI_FLASHSS_MMC_CORE_CONFIG_1,
Patrice Chotard819c6262017-09-05 11:04:18 +020051 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_1);
Patrice Chotardeee20f82017-02-21 13:37:09 +010052
Patrice Chotard819c6262017-09-05 11:04:18 +020053 if (plat->instance) {
Patrice Chotardeee20f82017-02-21 13:37:09 +010054 writel(STI_FLASHSS_MMC_CORE_CONFIG2,
Patrice Chotard819c6262017-09-05 11:04:18 +020055 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2);
Patrice Chotardeee20f82017-02-21 13:37:09 +010056 writel(STI_FLASHSS_MMC_CORE_CONFIG3,
Patrice Chotard819c6262017-09-05 11:04:18 +020057 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3);
Patrice Chotardeee20f82017-02-21 13:37:09 +010058 } else {
59 writel(STI_FLASHSS_SDCARD_CORE_CONFIG2,
Patrice Chotard819c6262017-09-05 11:04:18 +020060 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2);
Patrice Chotardeee20f82017-02-21 13:37:09 +010061 writel(STI_FLASHSS_SDCARD_CORE_CONFIG3,
Patrice Chotard819c6262017-09-05 11:04:18 +020062 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3);
Patrice Chotardeee20f82017-02-21 13:37:09 +010063 }
64 writel(STI_FLASHSS_MMC_CORE_CONFIG4,
Patrice Chotard819c6262017-09-05 11:04:18 +020065 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_4);
Patrice Chotarddca31662017-09-05 11:04:20 +020066
67 return 0;
Patrice Chotardeee20f82017-02-21 13:37:09 +010068}
69
70static int sti_sdhci_probe(struct udevice *dev)
71{
72 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
73 struct sti_sdhci_plat *plat = dev_get_platdata(dev);
74 struct sdhci_host *host = dev_get_priv(dev);
Patrice Chotard819c6262017-09-05 11:04:18 +020075 int ret;
Patrice Chotardeee20f82017-02-21 13:37:09 +010076
77 /*
78 * identify current mmc instance, mmc1 has a reset, not mmc0
79 * MMC0 is wired to the SD slot,
80 * MMC1 is wired on the high speed connector
81 */
Patrice Chotarddca31662017-09-05 11:04:20 +020082 ret = reset_get_by_index(dev, 0, &plat->reset);
83 if (!ret)
Patrice Chotard819c6262017-09-05 11:04:18 +020084 plat->instance = 1;
Patrice Chotardeee20f82017-02-21 13:37:09 +010085 else
Patrice Chotarddca31662017-09-05 11:04:20 +020086 if (ret == -ENOENT)
87 plat->instance = 0;
88 else
89 return ret;
Patrice Chotardeee20f82017-02-21 13:37:09 +010090
Patrice Chotarddca31662017-09-05 11:04:20 +020091 ret = sti_mmc_core_config(dev);
92 if (ret)
93 return ret;
Patrice Chotardeee20f82017-02-21 13:37:09 +010094
95 host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |
96 SDHCI_QUIRK_32BIT_DMA_ADDR |
97 SDHCI_QUIRK_NO_HISPD_BIT;
98
99 host->host_caps = MMC_MODE_DDR_52MHz;
Patrice Chotard2e01fcf2019-07-24 09:51:02 +0200100 host->mmc = &plat->mmc;
101 host->mmc->dev = dev;
102 host->mmc->priv = host;
Patrice Chotardeee20f82017-02-21 13:37:09 +0100103
104 ret = sdhci_setup_cfg(&plat->cfg, host, 50000000, 400000);
105 if (ret)
106 return ret;
107
Patrice Chotardeee20f82017-02-21 13:37:09 +0100108 upriv->mmc = host->mmc;
109
110 return sdhci_probe(dev);
111}
112
113static int sti_sdhci_ofdata_to_platdata(struct udevice *dev)
114{
115 struct sdhci_host *host = dev_get_priv(dev);
116
117 host->name = strdup(dev->name);
Simon Glassa821c4a2017-05-17 17:18:05 -0600118 host->ioaddr = (void *)devfdt_get_addr(dev);
Patrice Chotardeee20f82017-02-21 13:37:09 +0100119
120 host->bus_width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
121 "bus-width", 4);
122
123 return 0;
124}
125
126static int sti_sdhci_bind(struct udevice *dev)
127{
128 struct sti_sdhci_plat *plat = dev_get_platdata(dev);
129
130 return sdhci_bind(dev, &plat->mmc, &plat->cfg);
131}
132
133static const struct udevice_id sti_sdhci_ids[] = {
134 { .compatible = "st,sdhci" },
135 { }
136};
137
138U_BOOT_DRIVER(sti_mmc) = {
139 .name = "sti_sdhci",
140 .id = UCLASS_MMC,
141 .of_match = sti_sdhci_ids,
142 .bind = sti_sdhci_bind,
143 .ops = &sdhci_ops,
144 .ofdata_to_platdata = sti_sdhci_ofdata_to_platdata,
145 .probe = sti_sdhci_probe,
146 .priv_auto_alloc_size = sizeof(struct sdhci_host),
147 .platdata_auto_alloc_size = sizeof(struct sti_sdhci_plat),
148};