blob: c0ba647d094fe10fcdc5ccde81def635f7ac0955 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +01002/*
3 * (C) Copyright 2007-2013
4 * Stelian Pop <stelian.pop@leadtechdesign.com>
5 * Lead Tech Design <www.leadtechdesign.com>
6 * Thomas Petazzoni, Free Electrons, <thomas.petazzoni@free-electrons.com>
7 * Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
8 *
9 * Settings for Calao USB-A9263 board
10 *
11 * U-Boot image has to be less than 200704 bytes, otherwise at91bootstrap
12 * installed on board will not be able to load it properly.
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010013 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
17#include <asm/hardware.h>
18
19/* ARM asynchronous clock */
20#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
21#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010022
23#define CONFIG_MACH_TYPE MACH_TYPE_USB_A9263
24
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010025#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
26#define CONFIG_SETUP_MEMORY_TAGS
27#define CONFIG_INITRD_TAG
28
29#define CONFIG_SKIP_LOWLEVEL_INIT
30
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010031/*
32 * Hardware drivers
33 */
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010034/*
35 * BOOTP options
36 */
37#define CONFIG_BOOTP_BOOTFILESIZE
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010038
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010039/* SDRAM */
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010040#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
41#define CONFIG_SYS_SDRAM_SIZE 0x04000000
42
43#define CONFIG_SYS_INIT_SP_ADDR \
Wenyou.Yang@microchip.comfdc77182017-07-21 17:07:46 +080044 (ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010045
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010046/* NAND flash */
47#ifdef CONFIG_CMD_NAND
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010048#define CONFIG_SYS_MAX_NAND_DEVICE 1
49#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
50/* our ALE is AD21 */
51#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
52/* our CLE is AD22 */
53#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
54#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15)
55#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22)
56#endif
57
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010058/* Ethernet */
59#define CONFIG_MACB
60#define CONFIG_RMII
61#define CONFIG_NET_RETRY_COUNT 20
62#define CONFIG_AT91_WANTS_COMMON_PHY
63
64/* USB */
65#ifdef CONFIG_CMD_USB
66#define CONFIG_USB_ATMEL
67#define CONFIG_USB_OHCI_NEW
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010068#define CONFIG_SYS_USB_OHCI_CPU_INIT
69#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
70#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
71#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010072#endif
73
74#define CONFIG_SYS_LOAD_ADDR 0x22000000
75
76#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
77#define CONFIG_SYS_MEMTEST_END 0x23e00000
78
Wenyou.Yang@microchip.comfdc77182017-07-21 17:07:46 +080079/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010080#define CONFIG_BOOTCOMMAND "nboot 21000000 0"
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010081#define CONFIG_EXTRA_ENV_SETTINGS \
Tom Rini43ede0b2017-10-22 17:55:07 -040082 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010083
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010084/*
85 * Size of malloc() pool
86 */
87#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
88
89#endif