Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2002 |
| 4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Simon Glass | 36bf446 | 2019-11-14 12:57:42 -0700 | [diff] [blame] | 8 | #include <irq_func.h> |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 9 | |
| 10 | /* |
| 11 | * CPU test |
| 12 | * Load/store multiple word instructions: lmw, stmw |
| 13 | * |
Wolfgang Denk | 7ddd447 | 2011-12-23 01:29:12 +0000 | [diff] [blame] | 14 | * 27 consecutive words are loaded from a source memory buffer |
| 15 | * into GPRs r5 through r31. After that, 27 consecutive words are stored |
| 16 | * from the GPRs r5 through r31 into a target memory buffer. The contents |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 17 | * of the source and target buffers are then compared. |
| 18 | */ |
| 19 | |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 20 | #include <post.h> |
| 21 | #include "cpu_asm.h" |
| 22 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 23 | #if CONFIG_POST & CONFIG_SYS_POST_CPU |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 24 | |
Wolfgang Denk | a63aec5 | 2011-12-23 01:29:10 +0000 | [diff] [blame] | 25 | extern void cpu_post_exec_02(ulong *code, ulong op1, ulong op2); |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 26 | |
Wolfgang Denk | a63aec5 | 2011-12-23 01:29:10 +0000 | [diff] [blame] | 27 | int cpu_post_test_multi(void) |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 28 | { |
Wolfgang Denk | a63aec5 | 2011-12-23 01:29:10 +0000 | [diff] [blame] | 29 | int ret = 0; |
| 30 | unsigned int i; |
Wolfgang Denk | 7ddd447 | 2011-12-23 01:29:12 +0000 | [diff] [blame] | 31 | ulong src[27], dst[27]; |
Wolfgang Denk | a63aec5 | 2011-12-23 01:29:10 +0000 | [diff] [blame] | 32 | int flag = disable_interrupts(); |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 33 | |
Wolfgang Denk | 38081ff | 2011-12-23 01:29:11 +0000 | [diff] [blame] | 34 | ulong code[] = { |
| 35 | ASM_LMW(5, 3, 0), /* lmw r5, 0(r3) */ |
| 36 | ASM_STMW(5, 4, 0), /* stmr r5, 0(r4) */ |
| 37 | ASM_BLR, /* blr */ |
| 38 | }; |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 39 | |
Wolfgang Denk | 38081ff | 2011-12-23 01:29:11 +0000 | [diff] [blame] | 40 | for (i = 0; i < ARRAY_SIZE(src); ++i) { |
| 41 | src[i] = i; |
| 42 | dst[i] = 0; |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 43 | } |
| 44 | |
Wolfgang Denk | 38081ff | 2011-12-23 01:29:11 +0000 | [diff] [blame] | 45 | cpu_post_exec_02(code, (ulong) src, (ulong) dst); |
| 46 | |
| 47 | ret = memcmp(src, dst, sizeof(dst)) == 0 ? 0 : -1; |
| 48 | |
Wolfgang Denk | a63aec5 | 2011-12-23 01:29:10 +0000 | [diff] [blame] | 49 | if (ret != 0) |
| 50 | post_log("Error at multi test !\n"); |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 51 | |
Wolfgang Denk | a63aec5 | 2011-12-23 01:29:10 +0000 | [diff] [blame] | 52 | if (flag) |
| 53 | enable_interrupts(); |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 54 | |
Wolfgang Denk | a63aec5 | 2011-12-23 01:29:10 +0000 | [diff] [blame] | 55 | return ret; |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 56 | } |
| 57 | |
| 58 | #endif |